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https://github.com/c64scene-ar/llvm-6502.git
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e2c28ad84f
Different sized address spaces should theoretically work most of the time now, and since 64-bit add is currently disabled, using more 32-bit pointers fixes some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197659 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
1.3 KiB
LLVM
32 lines
1.3 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
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declare i32 @llvm.SI.tid() nounwind readnone
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declare void @llvm.AMDGPU.barrier.local() nounwind noduplicate
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; The required pointer calculations for the alloca'd actually requires
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; an add and won't be folded into the addressing, which fails with a
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; 64-bit pointer add. This should work since private pointers should
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; be 32-bits.
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; SI-LABEL: @test_private_array_ptr_calc:
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; SI: V_ADD_I32_e32 [[PTRREG:v[0-9]+]]
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; SI: V_MOVRELD_B32_e32 {{v[0-9]+}}, [[PTRREG]]
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define void @test_private_array_ptr_calc(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %inA, i32 addrspace(1)* noalias %inB) {
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%alloca = alloca [4 x i32], i32 4, align 16
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%tid = call i32 @llvm.SI.tid() readnone
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%a_ptr = getelementptr i32 addrspace(1)* %inA, i32 %tid
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%b_ptr = getelementptr i32 addrspace(1)* %inB, i32 %tid
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%a = load i32 addrspace(1)* %a_ptr
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%b = load i32 addrspace(1)* %b_ptr
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%result = add i32 %a, %b
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%alloca_ptr = getelementptr [4 x i32]* %alloca, i32 1, i32 %b
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store i32 %result, i32* %alloca_ptr, align 4
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; Dummy call
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call void @llvm.AMDGPU.barrier.local() nounwind noduplicate
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%reload = load i32* %alloca_ptr, align 4
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%out_ptr = getelementptr i32 addrspace(1)* %out, i32 %tid
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store i32 %reload, i32 addrspace(1)* %out_ptr, align 4
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ret void
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}
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