llvm-6502/test/CodeGen
Saleem Abdulrasool 2abadea537 ARM: yet another round of ARM test clean ups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205586 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 23:47:24 +00:00
..
AArch64 [AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS 2014-03-27 16:28:09 +00:00
ARM ARM: yet another round of ARM test clean ups 2014-04-03 23:47:24 +00:00
ARM64 [ARM64] Teach the ARM64DeadRegisterDefinition pass to respect implicit-defs. 2014-04-03 20:51:08 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Add more Octeon cnMips instructions 2014-04-02 18:40:43 +00:00
MSP430 Mark FPB as a reserved register when needed. 2014-04-02 13:13:56 +00:00
NVPTX Optimize away unnecessary address casts. 2014-04-03 21:18:25 +00:00
PowerPC [PowerPC] Add some missing VSX bitcast patterns 2014-04-01 19:24:27 +00:00
R600 R600: Correct opcode for BFE_INT 2014-04-03 20:19:29 +00:00
SPARC
SystemZ [SystemZ] Add support for z196 float<->unsigned conversions 2014-03-21 10:56:30 +00:00
Thumb ARM: yet another round of ARM test clean ups 2014-04-03 23:47:24 +00:00
Thumb2 ARM: yet another round of ARM test clean ups 2014-04-03 23:47:24 +00:00
X86 llvm/test/CodeGen/X86/peephole-multiple-folds.ll: Relax expressions to satisfy win32. 2014-04-03 20:07:51 +00:00
XCore