NAKAMURA Takumi 35d9566e68 llvm/test/CodeGen/X86/vec_ctbits.ll: Add explicit -mtriple=x86_64-unknown. It was incompatible to Win32 x64. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217683 91177308-0d34-0410-b5e6-96231b3b80d8

2014-09-12 15:10:56 +00:00

..

AArch64

Add DAG combine for shl + add of constants.

2014-09-11 17:34:19 +00:00

ARM

[ARM] Add Thumb-2 code size optimization regression test for LSR (register).

2014-09-11 10:45:50 +00:00

CPP

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Generic

Add a regression test to sanity check the PBQP allocator.

2014-09-03 18:04:10 +00:00

Hexagon

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Inputs

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Mips

Replace -use-init-array with -use-ctors.

2014-09-02 13:54:53 +00:00

MSP430

Drop the W postfix on the 16-bit registers.

2014-09-10 06:58:14 +00:00

NVPTX

[MachineSink] Use the real post dominator tree

2014-09-01 03:47:25 +00:00

PowerPC

Address comments on r217622

2014-09-12 14:26:36 +00:00

R600

R600/SI: Fix off by 1 error in used register count

2014-09-11 22:51:37 +00:00

SPARC

Provide an implementation of getNoopForMachoTarget for SPARC.

2014-09-11 17:40:51 +00:00

SystemZ

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Thumb

Check-label a bit more specific

2014-09-03 13:32:08 +00:00

Thumb2

ARM / x86_64 varargs: Don't save regparms in prologue without va_start

2014-08-22 21:59:26 +00:00

X86

llvm/test/CodeGen/X86/vec_ctbits.ll: Add explicit -mtriple=x86_64-unknown. It was incompatible to Win32 x64.

2014-09-12 15:10:56 +00:00

XCore

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