llvm-6502/test/CodeGen
Richard Osborne 83eab939a4 [XCore] Add dag combines for instructions that ignore some input bits.
These instructions ignore the high bits of one of their input operands -
try and use this to simplify the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202394 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 13:20:11 +00:00
..
AArch64 AArch64: simplify tbl/tbx polymorphism 2014-02-26 11:55:09 +00:00
ARM Stop test/CodeGen/ARM/a15.ll targetting non-ARM targets. 2014-02-26 11:26:18 +00:00
CPP
Generic
Hexagon Fix broken CHECK lines 2014-02-16 07:31:05 +00:00
Inputs
Mips [mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler. 2014-02-20 14:58:19 +00:00
MSP430
NVPTX
PowerPC Account for 128-bit integer operations in PPCCTRLoops 2014-02-25 20:51:50 +00:00
R600 R600/SI: Optimize SI_KILL for constant operands 2014-02-27 01:47:09 +00:00
SPARC SPARC: Implement TRAP lowering. Matches what GCC emits. 2014-02-23 21:43:52 +00:00
SystemZ
Thumb Add triples to try to fix the windows bots. 2014-02-13 16:49:47 +00:00
Thumb2 ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block 2014-02-26 11:27:28 +00:00
X86 Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets. 2014-02-27 09:24:31 +00:00
XCore [XCore] Add dag combines for instructions that ignore some input bits. 2014-02-27 13:20:11 +00:00