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This function is used to constrain a register class to a sub-class that supports the given sub-register index. For example, getSubClassWithSubReg(GR32, sub_8bit) -> GR32_ABCD. The function will be used to compute register classes when emitting INSERT_SUBREG and EXTRACT_SUBREG nodes and for register class inflation of sub-register operations. The version provided by TableGen is usually adequate, but targets can override. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141142 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
Mangler.h | ||
Target.td | ||
TargetCallingConv.h | ||
TargetCallingConv.td | ||
TargetData.h | ||
TargetELFWriterInfo.h | ||
TargetFrameLowering.h | ||
TargetInstrInfo.h | ||
TargetIntrinsicInfo.h | ||
TargetJITInfo.h | ||
TargetLibraryInfo.h | ||
TargetLowering.h | ||
TargetLoweringObjectFile.h | ||
TargetMachine.h | ||
TargetOpcodes.h | ||
TargetOptions.h | ||
TargetRegisterInfo.h | ||
TargetSchedule.td | ||
TargetSelectionDAG.td | ||
TargetSelectionDAGInfo.h | ||
TargetSubtargetInfo.h |