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llvm-6502/test/MC/Disassembler/ARM
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Owen Anderson 847a7ad800 More Thumb1 decoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 20:05:06 +00:00
..
arm-tests.txt
Add testcase for STRH. Patch by James Molloy.
2011-08-15 20:12:03 +00:00
basic-arm-instructions.txt
Fix incorrect encoding of UMAAL and friends. Patch by James Molloy.
2011-08-15 20:08:25 +00:00
dg.exp
…
fp-encoding.txt
Add some more comprehensive VFP decoding tests.
2011-08-15 21:29:01 +00:00
invalid-Bcc-thumb.txt
Tighten Thumb1 branch predicate decoding.
2011-08-09 21:07:45 +00:00
invalid-BFI-arm.txt
Create a new register class for the set of all GPRs except the PC. Use it to tighten our decoding of BFI.
2011-08-09 22:48:45 +00:00
invalid-CPS2p-arm.txt
Tighten operand checking on CPS instructions.
2011-08-09 23:05:39 +00:00
invalid-CPS3p-arm.txt
Tighten operand checking on CPS instructions.
2011-08-09 23:05:39 +00:00
invalid-DMB-thumb.txt
Tighten operand checking on memory barrier instructions.
2011-08-09 23:25:42 +00:00
invalid-DSB-arm.txt
Tighten operand checking on memory barrier instructions.
2011-08-09 23:25:42 +00:00
invalid-LDC-form-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-LDR_POST-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-LDR_PRE-arm.txt
Tighten operand decoding of addrmode2 instruction. The offset register cannot be PC.
2011-08-11 18:55:42 +00:00
invalid-LDRB_POST-arm.txt
Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
2011-08-17 17:44:15 +00:00
invalid-LDRD_PRE-thumb.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-LDRD-arm.txt
Test commit; adding test for invalid LDRD which was part of the patch for r137647 but seemingly didn't get svn add'ed.
2011-08-18 18:03:02 +00:00
invalid-LDRrs-arm.txt
Fix single word and unsigned byte data transfer instruction encodings so that
2011-03-31 19:28:35 +00:00
invalid-LDRT-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-LSL-regform.txt
Tighten operand checking of register-shifted-register operands.
2011-08-09 23:33:27 +00:00
invalid-MCR-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-MOVr-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-MOVs-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-MOVs-LSL-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-MOVTi16-arm.txt
Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
2011-08-10 00:03:03 +00:00
invalid-MSRi-arm.txt
Continue to tighten decoding by performing more operand validation.
2011-08-11 20:21:46 +00:00
invalid-RFEorLDMIA-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-RSC-arm.txt
Tighten operand checking of register-shifted-register operands.
2011-08-09 23:33:27 +00:00
invalid-SBFX-arm.txt
Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
2011-08-10 00:03:03 +00:00
invalid-SMLAD-arm.txt
Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
2011-08-10 00:03:03 +00:00
invalid-SRS-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-SSAT-arm.txt
Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
2011-08-10 00:03:03 +00:00
invalid-STMIA_UPD-thumb.txt
Continue to tighten decoding by performing more operand validation.
2011-08-11 20:21:46 +00:00
invalid-STRBrs-arm.txt
Continue to tighten decoding by performing more operand validation.
2011-08-11 20:21:46 +00:00
invalid-SXTB-arm.txt
Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
2011-08-10 00:03:03 +00:00
invalid-t2Bcc-thumb.txt
Tighten operand checking on memory barrier instructions.
2011-08-09 23:25:42 +00:00
invalid-t2LDRBT-thumb.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-t2LDREXD-thumb.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-t2LDRSHi8-thumb.txt
Improve operand validation for Thumb2 addressing modes.
2011-08-11 20:40:40 +00:00
invalid-t2LDRSHi12-thumb.txt
Improve operand validation for Thumb2 addressing modes.
2011-08-11 20:40:40 +00:00
invalid-t2STR_POST-thumb.txt
Improve operand validation for Thumb2 addressing modes.
2011-08-11 20:40:40 +00:00
invalid-t2STRD_PRE-thumb.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-t2STREXB-thumb.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-t2STREXD-thumb.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-UMAAL-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-UQADD8-arm.txt
Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
2011-08-10 00:03:03 +00:00
invalid-VLD1DUPq8_UPD-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-VLD3DUPd32_UPD-thumb.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-VLDMSDB_UPD-arm.txt
Improve error checking in the new ARM disassembler. Patch by James Molloy.
2011-08-11 18:24:51 +00:00
invalid-VQADD-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
invalid-VST2b32_UPD-arm.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
memory-arm-instructions.txt
Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact.
2011-08-15 20:51:32 +00:00
neon-tests.txt
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
2011-08-09 20:55:18 +00:00
neon.txt
Fix problems decoding the to/from-lane NEON memory instructions, and add a comprehensive NEON decoding testcase.
2011-08-15 18:44:44 +00:00
neont2.txt
Add a test file for Thumb2 NEON.
2011-08-15 23:42:20 +00:00
thumb1.txt
More Thumb1 decoding tests.
2011-08-18 20:05:06 +00:00
thumb-printf.txt
Disassembly of A8.6.59 LDR (literal) Encoding T1 (16-bit thumb instruction) should
2011-04-22 19:12:43 +00:00
thumb-tests.txt
Add a test for Thumb1 LDRSH decoding.
2011-08-15 20:15:43 +00:00