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LLVM backend for 6502
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8787c5f24e
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Evan Cheng 8787c5f24e Add a if-conversion optimization that allows 'true' side of a diamond to be 
unpredicated. That is, turn
 subeq  r0, r1, #1
 addne  r0, r1, #1                                                                                                                                                                                                     
into
 sub    r0, r1, #1
 addne  r0, r1, #1

For targets where conditional instructions are always executed, this may be
beneficial. It may remove pseudo anti-dependency in out-of-order execution
CPUs. e.g.
 op    r1, ...
 str   r1, [r10]        ; end-of-life of r1 as div result
 cmp   r0, #65
 movne r1, #44  ; raw dependency on previous r1
 moveq r1, #12

If movne is unpredicated, then
 op    r1, ...
 str   r1, [r10]
 cmp   r0, #65
 mov   r1, #44  ; r1 written unconditionally
 moveq r1, #12

Both mov and moveq are no longer depdendent on the first instruction. This gives
the out-of-order execution engine more freedom to reorder them.

This has passed entire LLVM test suite. But it has not been enabled for any ARM
variant pending more performance evaluation.

rdar://8951196


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146914 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 22:01:30 +00:00
autoconf capitalize project name, reference bugzilla 2011-12-18 18:50:16 +00:00
bindings LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
cmake Tweak CMake build on Cygwin. 2011-12-16 06:21:08 +00:00
docs Remove a register class that can just as well be synthesized. 2011-12-19 16:53:40 +00:00
examples LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
include Add a if-conversion optimization that allows 'true' side of a diamond to be 2011-12-19 22:01:30 +00:00
lib Add a if-conversion optimization that allows 'true' side of a diamond to be 2011-12-19 22:01:30 +00:00
projects Hexagon backend support 2011-12-12 21:14:40 +00:00
runtime LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
test Add a test case for r146900. 2011-12-19 20:24:28 +00:00
tools llvm-config: Fix --targets-built, I changed this to use the registry but wasn't 2011-12-16 00:04:43 +00:00
unittests As Doug pointed out (and I really should know), it is perfectly easy to 2011-12-17 10:20:15 +00:00
utils Emit a getMatchingSuperRegClass() implementation for every target. 2011-12-19 16:53:34 +00:00
.gitignore git: Add tools/lldb to the ignore list. 2011-11-10 22:55:50 +00:00
CMakeLists.txt capitalize project name, reference bugzilla 2011-12-18 18:50:16 +00:00
configure Hexagon backend support 2011-12-12 21:14:40 +00:00
CREDITS.TXT CREDITS.TXT: Add a line. (test commit) 2011-10-29 23:42:14 +00:00
LICENSE.TXT
llvm.spec.in
LLVMBuild.txt LLVMBuild: Introduce a common section which currently has a list of the 2011-12-12 22:45:54 +00:00
Makefile llvm-config: Replace with C++ version (was llvm-config-2). 2011-12-01 20:18:09 +00:00
Makefile.common
Makefile.config.in capitalize project name, reference bugzilla 2011-12-18 18:50:16 +00:00
Makefile.rules Add a deterministic finite automaton based packetizer for VLIW architectures 2011-12-01 21:10:21 +00:00
README.txt Undo test commit 2011-11-22 20:05:48 +00:00

README.txt 

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
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Please see the HTML documentation provided in docs/index.html for further
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