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https://github.com/c64scene-ar/llvm-6502.git
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5a01481585
codegen for FP_TO_UINT by using the legalizer's SELECT variant.
Implement a codegen improvement for SELECT_CC, selecting the false node in
the MBB that feeds the phi node. This allows us to codegen:
void foo(int *a, int b, int c) { int d = (a < b) ? 5 : 9; *a = d; }
as:
_foo:
li r2, 5
cmpw cr0, r4, r3
bgt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
li r2, 9
.LBB_foo_2: ; entry
stw r2, 0(r3)
blr
insted of:
_foo:
li r2, 5
li r5, 9
cmpw cr0, r4, r3
bgt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r5, r5
.LBB_foo_2: ; entry
stw r2, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22784 91177308-0d34-0410-b5e6-96231b3b80d8
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|---|---|---|
| .. | ||
| .cvsignore | ||
| LICENSE.TXT | ||
| Makefile | ||
| PowerPC.td | ||
| PowerPCInstrInfo.h | ||
| PowerPCTargetMachine.h | ||
| PPC32.td | ||
| PPC32ISelSimple.cpp | ||
| PPC32JITInfo.h | ||
| PPC32RegisterInfo.td | ||
| PPC64.td | ||
| PPC64RegisterInfo.td | ||
| PPC.h | ||
| PPCAsmPrinter.cpp | ||
| PPCBranchSelector.cpp | ||
| PPCCodeEmitter.cpp | ||
| PPCFrameInfo.h | ||
| PPCInstrBuilder.h | ||
| PPCInstrFormats.td | ||
| PPCInstrInfo.cpp | ||
| PPCInstrInfo.h | ||
| PPCInstrInfo.td | ||
| PPCISelPattern.cpp | ||
| PPCJITInfo.cpp | ||
| PPCJITInfo.h | ||
| PPCRegisterInfo.cpp | ||
| PPCRegisterInfo.h | ||
| PPCRegisterInfo.td | ||
| PPCRelocations.h | ||
| PPCSubtarget.cpp | ||
| PPCSubtarget.h | ||
| PPCTargetMachine.cpp | ||
| PPCTargetMachine.h | ||
| README.txt | ||
TODO:
* gpr0 allocation
* implement do-loop -> bdnz transform
* implement powerpc-64 for darwin
* use stfiwx in float->int
* be able to combine sequences like the following into 2 instructions:
lis r2, ha16(l2__ZTV4Cell)
la r2, lo16(l2__ZTV4Cell)(r2)
addi r2, r2, 8
* Teach LLVM how to codegen this:
unsigned short foo(float a) { return a; }
as:
_foo:
fctiwz f0,f1
stfd f0,-8(r1)
lhz r3,-2(r1)
blr
not:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
* Support 'update' load/store instructions. These are cracked on the G5, but
are still a codesize win.
* Add a custom legalizer for the GlobalAddress node, to move the funky darwin
stub stuff from the instruction selector to the legalizer (exposing low-level
operations to the dag for optzn. For example, we want to codegen this:
int A = 0;
void B() { A++; }
as:
lis r9,ha16(_A)
lwz r2,lo16(_A)(r9)
addi r2,r2,1
stw r2,lo16(_A)(r9)
not:
lis r2, ha16(_A)
lwz r2, lo16(_A)(r2)
addi r2, r2, 1
lis r3, ha16(_A)
stw r2, lo16(_A)(r3)
* should hint to the branch select pass that it doesn't need to print the
second unconditional branch, so we don't end up with things like:
b .LBBl42__2E_expand_function_8_674 ; loopentry.24
b .LBBl42__2E_expand_function_8_42 ; NewDefault
b .LBBl42__2E_expand_function_8_42 ; NewDefault