..
InstPrinter
MCTargetDesc
R600: Use correct encoding for Vertex Fetch instructions on Cayman
2013-06-14 22:12:30 +00:00
TargetInfo
AMDGPU.h
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPU.td
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPUAsmPrinter.cpp
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
R600/SI: Add support for v4i32 and v4f32 kernel args
2013-06-25 02:39:25 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
R600: Fix calculation of stack offset in AMDGPUFrameLowering
2013-06-07 20:52:05 +00:00
AMDGPUFrameLowering.h
AMDGPUIndirectAddressing.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
AMDGPUInstrInfo.cpp
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsics.td
AMDGPUISelLowering.cpp
R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
2013-06-25 13:55:57 +00:00
AMDGPUISelLowering.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
AMDGPURegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPUSubtarget.h
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPUTargetMachine.cpp
Move StructurizeCFG out of R600 to generic Transforms.
2013-06-19 20:18:24 +00:00
AMDGPUTargetMachine.h
Remove dead prototype.
2013-06-18 06:24:14 +00:00
AMDILBase.td
AMDILCFGStructurizer.cpp
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDILInstrInfo.td
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.cpp
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelDAGToDAG.cpp
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
2013-06-19 21:36:55 +00:00
AMDILISelLowering.cpp
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDILRegisterInfo.td
CMakeLists.txt
Move StructurizeCFG out of R600 to generic Transforms.
2013-06-19 20:18:24 +00:00
LLVMBuild.txt
Makefile
Processors.td
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
R600ControlFlowFinalizer.cpp
R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman
2013-06-14 22:12:24 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
R600ExpandSpecialInstrs.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
R600InstrFormats.td
R600: Use correct encoding for Vertex Fetch instructions on Cayman
2013-06-14 22:12:30 +00:00
R600InstrInfo.cpp
R600: PV stores Reg id, not index
2013-06-17 20:16:40 +00:00
R600InstrInfo.h
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
R600Instructions.td
R600: Add support for i32 loads from the constant address space on Cayman
2013-06-25 02:39:30 +00:00
R600Intrinsics.td
R600ISelLowering.cpp
R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
2013-06-25 13:55:57 +00:00
R600ISelLowering.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600: Use a refined heuristic to choose when switching clause
2013-06-07 23:30:34 +00:00
R600MachineScheduler.h
R600: Use a refined heuristic to choose when switching clause
2013-06-07 23:30:34 +00:00
R600OptimizeVectorRegisters.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
R600RegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
R600RegisterInfo.td
R600Schedule.td
R600: Fix typo in R600Schedule.td
2013-06-25 02:39:20 +00:00
R600TextureIntrinsicsReplacer.cpp
SIAnnotateControlFlow.cpp
SIDefines.h
SIInsertWaits.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
SIInstrFormats.td
SIInstrInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
SIInstrInfo.h
SIInstrInfo.td
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
2013-06-19 21:36:55 +00:00
SIInstructions.td
R600: Add SI load support for v[24]i32 and store for v2i32
2013-06-15 00:09:31 +00:00
SIIntrinsics.td
SIISelLowering.cpp
R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
2013-06-25 13:55:57 +00:00
SIISelLowering.h
R600/SI: Report unaligned memory accesses as legal for > 32-bit types
2013-06-25 02:39:35 +00:00
SILowerControlFlow.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
SIRegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
SIRegisterInfo.td
SISchedule.td