Richard Osborne 8ae8cf4559 On the XCore the scavenging slot should be closest to the SP. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127680 91177308-0d34-0410-b5e6-96231b3b80d8

2011-03-15 15:10:11 +00:00

..

2008-11-17-Shl64.ll

…

2009-01-08-Crash.ll

…

2009-01-14-Remat-Crash.ll

…

2009-03-27-v2f64-param.ll

…

2009-07-15-store192.ll

…

2010-02-25-LSR-Crash.ll

…

2010-04-07-DbgValueOtherTargets.ll

…

2011-01-31-DAGCombineBug.ll

…

addsub64.ll

…

ashr.ll

…

basictest.ll

…

bigstructret.ll

…

bitrev.ll

…

constants.ll

Be nice to Xcore and the XMOS assembler and avoid quoting section names

2011-03-04 20:03:14 +00:00

cos.ll

…

dg.exp

…

events.ll

Add XCore intrinsic for clre instruction.

2011-02-23 18:52:05 +00:00

exp2.ll

…

exp.ll

…

fneg.ll

…

getid.ll

…

globals.ll

Be nice to Xcore and the XMOS assembler and avoid quoting section names

2011-03-04 20:03:14 +00:00

indirectbr.ll

…

ladd_lsub_combine.ll

…

load.ll

…

log2.ll

…

log10.ll

…

log.ll

…

mul64.ll

…

pow.ll

…

powi.ll

…

private.ll

…

ps-intrinsics.ll

Add XCore intrinsics for getps, setps, setsr and clrsr.

2011-03-15 13:45:47 +00:00

resources.ll

Add XCore intrinsic for eeu instruction.

2011-02-24 13:39:18 +00:00

scavenging.ll

On the XCore the scavenging slot should be closest to the SP.

2011-03-15 15:10:11 +00:00

sext.ll

…

sin.ll

…

sqrt.ll

…

sr-intrinsics.ll

Add XCore intrinsics for getps, setps, setsr and clrsr.

2011-03-15 13:45:47 +00:00

store.ll

…

switch_long.ll

…

switch.ll

…

tls.ll

Be nice to Xcore and the XMOS assembler and avoid quoting section names

2011-03-04 20:03:14 +00:00

trampoline.ll

Fix mistyped CHECK lines.

2011-03-09 22:07:31 +00:00

trap.ll

…

unaligned_load.ll

…

unaligned_store_combine.ll

…

unaligned_store.ll

…