llvm-6502

2006-11-10-CycleInDAG.ll

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2007-01-19-InfiniteLoop.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

2007-01-31-RegInfoAssert.ll

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2007-02-02-JoinIntervalsCrash.ll

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2007-03-06-AddR7.ll

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2007-03-07-CombinerCrash.ll

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2007-03-13-InstrSched.ll

Expand GEPs in ScalarEvolution expressions. SCEV expressions can now

2009-04-16 03:18:22 +00:00

2007-03-21-JoinIntervalsCrash.ll

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2007-03-26-RegScavengerAssert.ll

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2007-03-27-RegScavengerAssert.ll

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2007-03-30-RegScavengerAssert.ll

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2007-04-02-RegScavengerAssert.ll

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2007-04-03-PEIBug.ll

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2007-04-03-UndefinedSymbol.ll

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2007-04-30-CombinerCrash.ll

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2007-05-03-BadPostIndexedLd.ll

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2007-05-05-InvalidPushPop.ll

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2007-05-07-jumptoentry.ll

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2007-05-07-tailmerge-1.ll

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2007-05-09-tailmerge-2.ll

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2007-05-14-InlineAsmCstCrash.ll

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2007-05-14-RegScavengerAssert.ll

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2007-05-22-tailmerge-3.ll

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2007-05-23-BadPreIndexedStore.ll

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2007-05-31-RegScavengerInfiniteLoop.ll

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2007-08-15-ReuseBug.ll

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2008-02-04-LocalRegAllocBug.ll

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2008-02-29-RegAllocLocal.ll

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2008-03-05-SxtInRegBug.ll

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2008-03-07-RegScavengerAssert.ll

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2008-04-04-ScavengerAssert.ll

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2008-04-10-ScavengerAssert.ll

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2008-04-11-PHIofImpDef.ll

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2008-05-19-LiveIntervalsBug.ll

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2008-05-19-ScavengerAssert.ll

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2008-07-17-Fdiv.ll

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2008-07-24-CodeGenPrepCrash.ll

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2008-08-07-AsmPrintBug.ll

Clean up some ARM GV asm printing out; minor fixes to match what gcc does.

2008-12-06 02:00:55 +00:00

2008-09-14-CoaleserBug.ll

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2008-09-17-CoalescerBug.ll

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2008-11-18-ScavengerAssert.ll

Register scavenger should process early clobber defs first. A dead early clobber def should not interfere with a normal def which happens one slot later.

2008-11-18 22:28:38 +00:00

2008-11-19-ScavengerAssert.ll

Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.

2009-06-05 19:08:58 +00:00

2009-02-16-SpillerBug.ll

A couple of places where reused use operands should be marked kill. This is exposed by recent availability fallthrough changes.

2009-02-17 06:41:03 +00:00

2009-02-22-SoftenFloatVaArg.ll

move a target-specific test into its directory so it isn't run if you

2009-04-10 23:58:38 +00:00

2009-02-27-SpillerBug.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

2009-03-07-SpillerBug.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

2009-03-09-AddrModeBug.ll

ARM isLegalAddressImmediate should check if type is a simple type now that optimizer can create values of funky scalar types.

2009-03-09 19:15:00 +00:00

2009-04-06-AsmModifier.ll

Use the output of the asm so the optimizer won't

2009-04-14 01:51:40 +00:00

2009-04-08-AggregateAddr.ll

Add testcase for PR3795.

2009-04-08 18:00:55 +00:00

2009-04-08-FloatUndef.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

2009-04-08-FREM.ll

Soft float support for FREM.

2009-04-08 16:20:57 +00:00

2009-04-09-RegScavengerAsm.ll

Fix pr3954. The register scavenger asserts for inline assembly with

2009-04-09 17:16:43 +00:00

2009-05-05-DAGCombineBug.ll

Do not use register as base ptr of pre- and post- inc/dec load / store nodes.

2009-05-06 18:25:01 +00:00

2009-05-07-RegAllocLocal.ll

Fix pr4100. Do not remove no-op copies when they are dead. The register

2009-05-07 23:47:03 +00:00

2009-05-11-CodePlacementCrash.ll

Fix pr4195: When iterating through predecessor blocks, break out of the loop

2009-05-12 03:48:10 +00:00

2009-05-18-InlineAsmMem.ll

Fix pr4091: Add support for "m" constraint in ARM inline assembly.

2009-05-19 05:53:42 +00:00

2009-06-04-MissingLiveIn.ll

A value defined by an implicit_def can be liven to a use BB. This is unfortunate. But register allocator still has to add it to the live-in set of the use BB.

2009-06-04 20:25:48 +00:00

2009-06-12-RegScavengerAssert.ll

If killed register is defined by implicit_def, do not clear it since it's live range may overlap another def of same register.

2009-06-12 21:34:26 +00:00

2009-06-15-RegScavengerAssert.ll

If a val# is defined by an implicit_def and it is being removed, all of the copies off the val# were removed. This causes problem later since the scavenger will see uses of registers without defs. The proper solution is to change the copies into implicit_def's instead.

2009-06-16 07:12:58 +00:00

2009-06-18-ThumbCommuteMul.ll

Mark a few Thumb instructions commutable; just happened to spot this

2009-06-19 01:43:08 +00:00

2009-06-19-RegScavengerAssert.ll

Fix PR4419: handle defs of partial uses.

2009-06-20 04:34:51 +00:00

addrmode.ll

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aliases.ll

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align.ll

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alloca.ll

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argaddr.ll

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arguments2.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

arguments3.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

arguments4.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

arguments5.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

arguments6.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

arguments7.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

arguments8.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

arguments_f64_backfill.ll

Add testcase for register scanveger assertion fix in r72755

2009-06-08 22:54:15 +00:00

arguments-nosplit-double.ll

Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and

2009-05-19 10:02:36 +00:00

arguments-nosplit-i64.ll

Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and

2009-05-19 10:02:36 +00:00

arguments.ll

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arm-asm.ll

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arm-frameaddr.ll

hasFP should return true if frame address is taken.

2009-06-22 18:38:48 +00:00

arm-negative-stride.ll

Add nounwind to a few tests.

2009-05-18 15:16:49 +00:00

bits.ll

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branch.ll

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bx_fold.ll

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call_nolink.ll

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call.ll

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clz.ll

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compare-call.ll

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constants.ll

Do not emit comments unless -asm-verbose.

2009-03-24 00:17:40 +00:00

cse-libcalls.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

ctors_dtors.ll

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dg.exp

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div.ll

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dyn-stackalloc.ll

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extloadi1.ll

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fcopysign.ll

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fixunsdfdi.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

fmdrr-fmrrd.ll

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fnmul.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

formal.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

fp.ll

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fparith.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

fpcmp_ueq.ll

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fpcmp.ll

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fpconv.ll

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fpmem.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

fpow.ll

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fpowi.ll

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fptoint.ll

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frame_thumb.ll

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hello.ll

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hidden-vis-2.ll

Clean up some ARM GV asm printing out; minor fixes to match what gcc does.

2008-12-06 02:00:55 +00:00

hidden-vis-3.ll

Clean up some ARM GV asm printing out; minor fixes to match what gcc does.

2008-12-06 02:00:55 +00:00

hidden-vis.ll

Clean up some ARM GV asm printing out; minor fixes to match what gcc does.

2008-12-06 02:00:55 +00:00

iabs.ll

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ifcvt1.ll

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ifcvt2.ll

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ifcvt3.ll

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ifcvt4.ll

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ifcvt5.ll

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ifcvt6.ll

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ifcvt7.ll

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ifcvt8.ll

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ifcvt9.ll

ifcvt should ignore cfg where true and false successors are the same.

2009-06-15 21:24:34 +00:00

illegal-vector-bitcast.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

imm.ll

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inlineasm2.ll

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inlineasm-imm-arm.ll

Fix PR3862: Recognize some ARM-specific constraints for immediates in inline

2009-04-01 17:58:54 +00:00

inlineasm-imm-thumb.ll

Fix PR3862: Recognize some ARM-specific constraints for immediates in inline

2009-04-01 17:58:54 +00:00

inlineasm.ll

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insn-sched1.ll

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ispositive.ll

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large-stack.ll

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ldm.ll

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ldr_ext.ll

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ldr_frame.ll

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ldr_post.ll

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ldr_pre.ll

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ldr.ll

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ldrd.ll

Enable arm pre-allocation load / store multiple optimization pass.

2009-06-19 23:17:27 +00:00

load-global.ll

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load.ll

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long_shift.ll

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long-setcc.ll

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long.ll

Do not emit comments unless -asm-verbose.

2009-03-24 00:17:40 +00:00

lsr-code-insertion.ll

Mark some pattern-less instructions as neverHasSideEffects.

2009-06-12 20:46:18 +00:00

lsr-scale-addr-mode.ll

Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.

2009-06-05 19:08:58 +00:00

mem.ll

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memcpy-inline.ll

Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then.

2009-06-05 19:08:58 +00:00

memfunc.ll

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mul.ll

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mulhi.ll

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mvn.ll

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pack.ll

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pr3502.ll

If a use operand is marked isKill, don't forget to add kill to its live interval as well.

2009-02-22 08:35:56 +00:00

private.ll

Add the private linkage.

2009-01-15 20:18:42 +00:00

remat.ll

Turn on machine LICM in non-fast mode.

2009-02-05 08:46:33 +00:00

ret0.ll

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ret_arg1.ll

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ret_arg2.ll

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ret_arg3.ll

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ret_arg4.ll

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ret_arg5.ll

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ret_f32_arg2.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_f32_arg5.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_f64_arg2.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_f64_arg_reg_split.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_f64_arg_split.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_f64_arg_stack.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_i64_arg2.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_i64_arg3.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_i64_arg_split.ll

Use CallConvLower.h and TableGen descriptions of the calling conventions

2009-04-17 19:07:39 +00:00

ret_i128_arg2.ll

Rename file to have the correct suffix.

2009-04-17 20:40:20 +00:00

ret_void.ll

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rev.ll

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section.ll

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select_xform.ll

add no-unwind, remove duplicate run line.

2009-03-12 05:56:37 +00:00

select.ll

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shifter_operand.ll

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smul.ll

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stack-frame.ll

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stm.ll

Enable arm pre-allocation load / store multiple optimization pass.

2009-06-19 23:17:27 +00:00

str_post.ll

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str_pre-2.ll

Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface.

2009-06-04 01:15:28 +00:00

str_pre.ll

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str_trunc.ll

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sxt_rot.ll

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thread_pointer.ll

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thumb2-add.ll

Initial support for some Thumb2 instructions.

2009-06-17 18:13:58 +00:00

thumb2-mov2.ll

Initial support for some Thumb2 instructions.

2009-06-17 18:13:58 +00:00

thumb2-mov.ll

Initial support for some Thumb2 instructions.

2009-06-17 18:13:58 +00:00

thumb2-shifter.ll

Initial support for some Thumb2 instructions.

2009-06-17 18:13:58 +00:00

thumb-imm.ll

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tls1.ll

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tls2.ll

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tls3.ll

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trunc_ldr.ll

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truncstore-dag-combine.ll

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tst_teq.ll

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uint64tof64.ll

Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.

2008-11-04 22:19:55 +00:00

unaligned_load_store.ll

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unord.ll

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uxt_rot.ll

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uxtb.ll

Recognize triplets starting with armv5-, armv6- etc. And set the ARM arch version accordingly.

2009-03-08 04:02:49 +00:00

vargs2.ll

Make the test target-neutral

2009-06-16 20:25:25 +00:00

vargs_align.ll

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vargs.ll

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vfp.ll

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

weak2.ll

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weak.ll

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