Evan Cheng 8ef0968dc2 Emit a single _udivmodsi4 libcall instead of two separate _udivsi3 and ...

_umodsi3 libcalls if they have the same arguments. This optimization
was apparently broken if one of the node was replaced in place.
rdar://11714607


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158900 91177308-0d34-0410-b5e6-96231b3b80d8

2012-06-21 05:56:05 +00:00

..

CMakeLists.txt

…

DAGCombiner.cpp

Add users of a MERGE_VALUE node to the worklist to process again when the node is removed. Sorry, no test case. Foudn it by inspection of the code

2012-06-20 19:35:43 +00:00

FastISel.cpp

…

FunctionLoweringInfo.cpp

…

InstrEmitter.cpp

…

InstrEmitter.h

…

LegalizeDAG.cpp

Emit a single _udivmodsi4 libcall instead of two separate _udivsi3 and

2012-06-21 05:56:05 +00:00

LegalizeFloatTypes.cpp

…

LegalizeIntegerTypes.cpp

…

LegalizeTypes.cpp

…

LegalizeTypes.h

…

LegalizeTypesGeneric.cpp

…

LegalizeVectorOps.cpp

…

LegalizeVectorTypes.cpp

…

LLVMBuild.txt

…

Makefile

…

ResourcePriorityQueue.cpp

misched: Added MultiIssueItineraries.

2012-06-05 03:44:40 +00:00

ScheduleDAGFast.cpp

…

ScheduleDAGRRList.cpp

sdsched: Use the right heuristics when -mcpu is not provided and we have no itinerary.

2012-06-05 03:44:34 +00:00

ScheduleDAGSDNodes.cpp

…

ScheduleDAGSDNodes.h

misched: API for minimum vs. expected latency.

2012-06-05 21:11:27 +00:00

ScheduleDAGVLIW.cpp

…

SDNodeDbgValue.h

…

SDNodeOrdering.h

…

SelectionDAG.cpp

…

SelectionDAGBuilder.cpp

Add a new intrinsic: llvm.fmuladd. This intrinsic represents a multiply-add

2012-06-05 19:07:46 +00:00

SelectionDAGBuilder.h

Fix typos found by http://github.com/lyda/misspell-check

2012-06-02 10:20:22 +00:00

SelectionDAGDumper.cpp

…

SelectionDAGISel.cpp

…

SelectionDAGPrinter.cpp

…

TargetLowering.cpp

Remove the "-promote-elements" flag. This flag is now enabled by default.

2012-06-04 11:27:21 +00:00

TargetSelectionDAGInfo.cpp

…