llvm-6502/lib/CodeGen/SelectionDAG
Chris Lattner 8f03405ee5 Fix a problem where constant expr shifts would not have their shift amount
promoted to the right type.  This fixes: IA64/2005-08-22-LegalizerCrash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22969 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 17:28:31 +00:00
..
LegalizeDAG.cpp When legalizing brcond ->brcc or select -> selectcc, make sure to truncate 2005-08-21 18:03:09 +00:00
Makefile
ScheduleDAG.cpp Add a fast-path for register values. Add support for constant pool entries, 2005-08-22 01:04:32 +00:00
SelectionDAG.cpp add anew method 2005-08-21 22:30:30 +00:00
SelectionDAGISel.cpp Fix a problem where constant expr shifts would not have their shift amount 2005-08-22 17:28:31 +00:00
SelectionDAGPrinter.cpp Print physreg register nodes with target names (e.g. F1) instead of numbers 2005-08-19 21:21:16 +00:00
TargetLowering.cpp For: memory operations -> stores 2005-07-19 04:52:44 +00:00