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ad5f0c9e73
removing support for Mips1 and Mips2. This change and the ones that follow have been discussed with and approved by Bruno. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139344 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
1.0 KiB
LLVM
23 lines
1.0 KiB
LLVM
; RUN: llc < %s -march=mips -relocation-model=static -mcpu=mips1 | FileCheck %s
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; RUN: llc < %s -march=mips -relocation-model=static -regalloc=basic -mcpu=mips1 | FileCheck %s
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; Fix PR7473
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define i32 @main() nounwind readnone {
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entry:
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%a = alloca i32, align 4 ; <i32*> [#uses=2]
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%c = alloca i32, align 4 ; <i32*> [#uses=2]
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volatile store i32 1, i32* %a, align 4
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volatile store i32 0, i32* %c, align 4
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%0 = volatile load i32* %a, align 4 ; <i32> [#uses=1]
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%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
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; CHECK: addiu $[[R1:[0-9]+]], $zero, 0
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%iftmp.0.0 = select i1 %1, i32 3, i32 0 ; <i32> [#uses=1]
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%2 = volatile load i32* %c, align 4 ; <i32> [#uses=1]
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%3 = icmp eq i32 %2, 0 ; <i1> [#uses=1]
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; CHECK: addiu $[[R1]], $zero, 3
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; CHECK: addu $2, ${{.}}, $[[R1]]
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%iftmp.2.0 = select i1 %3, i32 0, i32 5 ; <i32> [#uses=1]
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%4 = add nsw i32 %iftmp.2.0, %iftmp.0.0 ; <i32> [#uses=1]
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ret i32 %4
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}
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