llvm-6502/test/CodeGen
Benjamin Kramer 914f8c4825 When the legalizer is splitting vector shifts, the result may not have the right shift amount type.
Fix that by adding a cast to the shift expander. This came up with vector shifts
on sse-less X86 CPUs.

   <2 x i64>       = shl <2 x i64> <2 x i64>
-> i64,i64         = shl i64 i64; shl i64 i64
-> i32,i32,i32,i32 = shl_parts i32 i32 i64; shl_parts i32 i32 i64

Now we cast the last two i64s to the right type. Fixes the crash in PR14668.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173615 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-27 11:19:11 +00:00
..
ARM Fixed the condition codes for the atomic64 min/umin code generation on ARM. If the sutraction of the higher 32 bit parts gives a 0 result, we need to do the store operation. 2013-01-25 10:39:49 +00:00
CPP test commit 2012-07-18 17:53:05 +00:00
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Add indexed load/store instructions for offset validation check. 2013-01-17 18:42:37 +00:00
MBlaze
Mips [mips] Set flag neverHasSideEffects flag on some of the floating point instructions. 2013-01-25 00:20:39 +00:00
MSP430 Add support for varargs functions for msp430. 2012-11-21 17:28:27 +00:00
NVPTX [NVPTX] Fix crash with unnamed struct arguments 2012-12-05 20:50:28 +00:00
PowerPC Restore reverted test case, this time with REQUIRES: asserts 2013-01-17 19:46:51 +00:00
R600 DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes 2013-01-02 22:13:01 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC Use TargetTransformInfo to control switch-to-lookup table transformation 2012-10-30 11:23:25 +00:00
Thumb Use the 'count' attribute to calculate the upper bound of an array. 2012-12-04 21:34:03 +00:00
Thumb2 FileCheck-ify some grep tests 2013-01-25 22:11:46 +00:00
X86 When the legalizer is splitting vector shifts, the result may not have the right shift amount type. 2013-01-27 11:19:11 +00:00
XCore Fix handling of aliases to functions. 2012-11-16 21:12:38 +00:00