Pranav Bhandarkar 02d937d864 Hexagon - Add peephole optimizations for zero extends. ...

* lib/Target/Hexagon/HexagonInstrInfo.td: Add patterns to combine a
	sequence of a pair of i32->i64 extensions followed by a "bitwise or"
	into COMBINE_rr.
	* lib/Target/Hexagon/HexagonPeephole.cpp: Copy propagate Rx in the
	instruction Rp = COMBINE_Ir_V4(0, Rx) to the uses of Rp:subreg_loreg.
	* test/CodeGen/Hexagon/union-1.ll: New test.
	* test/CodeGen/Hexagon/combine_ir.ll: Fix test.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180946 91177308-0d34-0410-b5e6-96231b3b80d8

2013-05-02 20:22:51 +00:00

..

absaddr-store.ll

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absimm.ll

Hexagon: Remove duplicate instructions to handle global/immediate values

2013-04-23 17:11:46 +00:00

adde.ll

Hexagon: Expand addc, adde, subc and sube.

2013-03-05 19:04:47 +00:00

always-ext.ll

Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.

2013-04-23 21:17:40 +00:00

args.ll

Hexagon: Add encoding bits to the TFR64 instructions.

2013-03-05 18:42:28 +00:00

ashift-left-right.ll

Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth.

2013-03-26 15:43:57 +00:00

block-addr.ll

Hexagon: Add support to lower block address.

2013-03-07 19:10:28 +00:00

cext-check.ll

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cext-valid-packet1.ll

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cext-valid-packet2.ll

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cmp_pred2.ll

Hexagon: Remove assembler mapped instruction definitions.

2013-04-23 19:15:55 +00:00

cmp_pred_reg.ll

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cmp_pred.ll

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cmp-to-genreg.ll

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cmp-to-predreg.ll

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cmpb_pred.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

combine_ir.ll

Hexagon - Add peephole optimizations for zero extends.

2013-05-02 20:22:51 +00:00

combine.ll

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convertdptoint.ll

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convertdptoll.ll

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convertsptoint.ll

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convertsptoll.ll

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ctlz-cttz-ctpop.ll

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dadd.ll

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dmul.ll

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double.ll

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doubleconvert-ieee-rnd-near.ll

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dsub.ll

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dualstore.ll

Hexagon: Add encoding bits to the TFR64 instructions.

2013-03-05 18:42:28 +00:00

fadd.ll

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fcmp.ll

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float.ll

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floatconvert-ieee-rnd-near.ll

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fmul.ll

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frame.ll

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fsub.ll

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fusedandshift.ll

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gp-plus-offset-load.ll

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gp-plus-offset-store.ll

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gp-rel.ll

Hexagon: Use multiclass for gp-relative instructions.

2013-03-28 16:25:57 +00:00

hwloop-cleanup.ll

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hwloop-const.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

hwloop-dbg.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

hwloop-le.ll

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hwloop-lt1.ll

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hwloop-lt.ll

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hwloop-ne.ll

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i1_VarArg.ll

Hexagon: Handle i8, i16 and i1 Var Args.

2013-03-07 20:28:34 +00:00

i8_VarArg.ll

Hexagon: Handle i8, i16 and i1 Var Args.

2013-03-07 20:28:34 +00:00

i16_VarArg.ll

Hexagon: Handle i8, i16 and i1 Var Args.

2013-03-07 20:28:34 +00:00

idxload-with-zero-offset.ll

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indirect-br.ll

Hexagon: Add support to lower block address.

2013-03-07 19:10:28 +00:00

lit.local.cfg

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macint.ll

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memops1.ll

Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.

2013-03-22 18:41:34 +00:00

memops2.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

memops3.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

memops.ll

Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.

2013-03-22 18:41:34 +00:00

misaligned-access.ll

Hexagon: Removed asserts regarding alignment and offset.

2013-03-14 19:08:03 +00:00

mpy.ll

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newvaluejump2.ll

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newvaluejump.ll

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newvaluestore.ll

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opt-fabs.ll

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opt-fneg.ll

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postinc-load.ll

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postinc-store.ll

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pred-absolute-store.ll

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predicate-copy.ll

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remove_lsr.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

simpletailcall.ll

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static.ll

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struct_args_large.ll

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struct_args.ll

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sube.ll

Hexagon: Expand addc, adde, subc and sube.

2013-03-05 19:04:47 +00:00

union-1.ll

Hexagon - Add peephole optimizations for zero extends.

2013-05-02 20:22:51 +00:00

vaddh.ll

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validate-offset.ll

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zextloadi1.ll

Hexagon: Add patterns for zero extended loads from i1->i64.

2013-03-08 14:15:15 +00:00