llvm-6502/lib/Target
2005-12-04 19:01:59 +00:00
..
Alpha major think-o 2005-12-01 17:48:51 +00:00
CBackend do not allow '.' in symbol names 2005-11-10 21:39:29 +00:00
IA64 IA64 doesn't support the LOCATION node, and for some reason the ISelPattern 2005-12-01 18:19:53 +00:00
PowerPC Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen 2005-12-04 19:01:59 +00:00
Skeleton Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
Sparc Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
SparcV8 Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
SparcV9 Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
X86 Added isel patterns for RET, JMP, and WRITEPORT. 2005-12-04 08:19:43 +00:00
Makefile DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now 2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp Preparation of supporting scheduling info. Need to find info based on selected 2005-10-25 15:15:28 +00:00
Target.td * Added instruction property hasCtrlDep for those which r/w control-flow 2005-12-04 08:13:17 +00:00
TargetData.cpp Update to use the new MathExtras.h support for log2 computation. 2005-08-02 19:26:06 +00:00
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp Remove the X86 and PowerPC Simple instruction selectors; their time has 2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSchedule.td add a marker 2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td * Added instruction property hasCtrlDep for those which r/w control-flow 2005-12-04 08:13:17 +00:00
TargetSubtarget.cpp