Andrea Di Biagio 971eb1b382 [X86][FastIsel] Teach how to select vector load instructions. ... This patch teaches fast-isel how to select 128-bit vector load instructions. Added test CodeGen/X86/fast-isel-vecload.ll Differential Revision: http://reviews.llvm.org/D8605 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233270 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-26 11:29:02 +00:00
..
AArch64	[AArch64, ARM] Enable GlobalMerge with -O3 rather than -O1.	2015-03-23 21:17:36 +00:00
ARM	[AArch64, ARM] Enable GlobalMerge with -O3 rather than -O1.	2015-03-23 21:17:36 +00:00
BPF	[opaque pointer type] Add textual IR support for explicit type parameter to gep operator	2015-03-13 18:20:45 +00:00
CPP
Generic	Unxfail test/CodeGen/Generic/vector.ll now passing on Hexagon	2015-03-19 20:22:17 +00:00
Hexagon	[Hexagon] Add support for vector instructions	2015-03-19 16:33:08 +00:00
Inputs
Mips	[mips] Support 16-bit offsets for 'm' inline assembly memory constraint.	2015-03-24 15:19:14 +00:00
MSP430	[opaque pointer type] Add textual IR support for explicit type parameter to gep operator	2015-03-13 18:20:45 +00:00
NVPTX	Add support for __nvvm_reflect changes in libdevice in CUDA-7.0	2015-03-19 17:05:35 +00:00
PowerPC	Testcase for r233239.	2015-03-26 00:57:33 +00:00
R600	R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset	2015-03-24 13:40:34 +00:00
SPARC	[opaque pointer type] Add textual IR support for explicit type parameter to gep operator	2015-03-13 18:20:45 +00:00
SystemZ
Thumb	[ARM] Fix handling of thumb1 out-of-range frame offsets	2015-03-20 17:20:07 +00:00
Thumb2	Fix a nasty bug in DAGCombine of STORE nodes.	2015-03-19 22:48:57 +00:00
WinEH	WinEH: Create an unwind help alloca for __CxxFrameHandler3 xdata tables	2015-03-25 20:10:36 +00:00
X86	[X86][FastIsel] Teach how to select vector load instructions.	2015-03-26 11:29:02 +00:00
XCore	DebugInfo: Fix testcases that fail -verify-debug-info=true	2015-03-16 21:10:12 +00:00