llvm-6502/test/CodeGen
2013-05-26 08:58:50 +00:00
..
AArch64 Track IR ordering of SelectionDAG nodes 3/4. 2013-05-25 03:08:10 +00:00
ARM Track IR ordering of SelectionDAG nodes 4/4. 2013-05-25 03:26:51 +00:00
CPP
Generic Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen. 2013-05-21 14:37:16 +00:00
Hexagon Hexagon: Pass to replace tranfer/copy instructions into combine instruction 2013-05-14 18:54:06 +00:00
Inputs
MBlaze
Mips Track IR ordering of SelectionDAG nodes 4/4. 2013-05-25 03:26:51 +00:00
MSP430
NVPTX [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic 2013-05-21 16:51:30 +00:00
PowerPC PPC: Combine duplicate (offset) lvsl Altivec intrinsics 2013-05-25 04:05:05 +00:00
R600 R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg 2013-05-23 18:26:42 +00:00
SI
SPARC Also expand 64-bit bitcasts. 2013-05-20 01:01:43 +00:00
SystemZ [SystemZ] Tighten branch tests 2013-05-21 08:53:17 +00:00
Thumb
Thumb2 Fix ARM FastISel tests, as a first step to enabling ARM FastISel 2013-05-14 16:26:38 +00:00
X86 Fix PR16143: Insert DEBUG_VALUE before terminator. 2013-05-26 08:58:50 +00:00
XCore