Tom Stellard 9f0d68f522 R600/SI: Expand all v16[if]32 operations ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202543 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-28 21:36:37 +00:00
..
AArch64
ARM	Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now	2014-02-27 17:56:08 +00:00
CPP
Generic	CommandLine: Exit successfully for -version and -help	2014-02-28 19:08:01 +00:00
Hexagon
Inputs
Mips	Fixed operand of SC microMIPS instruction.	2014-02-28 18:22:56 +00:00
MSP430
NVPTX
PowerPC	Swap PPC isel operands to allow for 0-folding	2014-02-28 06:11:16 +00:00
R600	R600/SI: Expand all v16[if]32 operations	2014-02-28 21:36:37 +00:00
SPARC	Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding	2014-02-27 19:26:29 +00:00
SystemZ
Thumb
Thumb2
X86	Test commit	2014-02-28 18:44:39 +00:00
XCore	[XCore] Support functions returning more than 4 words.	2014-02-27 17:47:54 +00:00