Igor Breger 6df163bcdf Implemented encoding and intrinsics of the following instructions ... vunpckhps/pd, vunpcklps/pd, vpunpcklbw, vpunpckhbw, vpunpcklwd, vpunpckhwd, vpunpckldq, vpunpckhdq, vpunpcklqdq, vpunpckhqdq Added tests for intrinsics and encoding. Differential Revision: http://reviews.llvm.org/D11509 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243246 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-26 14:41:44 +00:00
..
AArch64	AArch64: add rev64 alias for 64-bit rev instruction.	2015-07-14 17:07:29 +00:00
AMDGPU	AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support	2015-06-26 21:58:31 +00:00
ARM	[ARM] Handle commutativity when converting to tADDhirr in Thumb2	2015-07-13 15:31:48 +00:00
AsmParser
COFF	[MC] Correctly escape .safeseh's symbol	2015-07-13 18:51:15 +00:00
Disassembler	[mips] Added support for the ERETNC instruction.	2015-07-20 12:28:56 +00:00
ELF	[X86] Fix incorrect/inefficient pushw encodings for x86-64 targets	2015-07-05 10:25:41 +00:00
Hexagon
MachO	[AsmPrinter] Check for valid constants in handleIndirectSymViaGOTPCRel	2015-07-21 21:45:42 +00:00
Markup
Mips	[mips] Added support for the ERETNC instruction.	2015-07-20 12:28:56 +00:00
PowerPC	[PPC] Implement vmrgew and vmrgow instructions	2015-06-25 15:17:40 +00:00
Sparc	[Sparc] Add more instruction aliases.	2015-07-06 16:01:07 +00:00
SystemZ
X86	Implemented encoding and intrinsics of the following instructions	2015-07-26 14:41:44 +00:00