llvm-6502/test/CodeGen
Eli Friedman 9f3b6a5a2a Fix mistake in test runline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-12 17:32:58 +00:00
..
Alpha
ARM Fix mistake in test runline. 2011-09-12 17:32:58 +00:00
Blackfin
CBackend Revert r137134. It breaks some code as Eli pointed out. 2011-08-09 18:56:35 +00:00
CellSPU Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction. 2011-09-02 10:05:01 +00:00
CPP
Generic This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll 2011-09-08 08:43:23 +00:00
MBlaze
Mips Fix test cases. 2011-09-09 23:14:58 +00:00
MSP430
PowerPC Split the init.trampoline intrinsic, which currently combines GCC's 2011-09-06 13:37:06 +00:00
PTX PTX: Add initial support for device function calls 2011-08-09 17:36:31 +00:00
SPARC
SystemZ
Thumb Disable these tests harder. They're XFAIL'd, but that means they still run, and 2011-09-06 22:08:18 +00:00
Thumb2 Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical 2011-08-30 01:34:54 +00:00
X86 Really un-XFAIL the testcase, like I said I would in r139458. 2011-09-10 02:02:27 +00:00
XCore Associate a MemOperand with LDWCP nodes introduced during ISel. 2011-09-12 14:43:23 +00:00