Chris Lattner 6b0e3f8907 Make CanFallThrough more intelligent (so it can handle blocks with (e.g.) no ... successors), and make island block movement more general. This compiles CodeGen/X86/2006-04-27-ISelFoldingBug.ll to: _loadAndRLEsource_no_exit_2E_1_label_2E_0: subl $8, %esp movl %esi, 4(%esp) movl %ebx, (%esp) movl 16(%esp), %eax movl 12(%esp), %ecx LBB1_3: #label.0 movl _last, %edx movl %edx, %esi incl %esi movl %esi, _last movl %ecx, %ebx # TRUNCATE movb %bl, %bl movl _block, %esi movb %bl, 1(%esi,%edx) cmpl %eax, _last jge LBB1_2 #codeRepl5.exitStub LBB1_4: #label.0 cmpl $257, %ecx je LBB1_2 #codeRepl5.exitStub LBB1_1: #label.0.no_exit.1_crit_edge.exitStub movl $1, %eax movl (%esp), %ebx movl 4(%esp), %esi addl $8, %esp ret LBB1_2: #codeRepl5.exitStub xorl %eax, %eax movl (%esp), %ebx movl 4(%esp), %esi addl $8, %esp ret instead of: _loadAndRLEsource_no_exit_2E_1_label_2E_0: subl $8, %esp movl %esi, 4(%esp) movl %ebx, (%esp) movl 16(%esp), %eax movl 12(%esp), %ecx jmp LBB1_3 #label.0 LBB1_1: #label.0.no_exit.1_crit_edge.exitStub movl $1, %eax movl (%esp), %ebx movl 4(%esp), %esi addl $8, %esp ret LBB1_2: #codeRepl5.exitStub xorl %eax, %eax movl (%esp), %ebx movl 4(%esp), %esi addl $8, %esp ret LBB1_3: #label.0 movl _last, %edx movl %edx, %esi incl %esi movl %esi, _last movl %ecx, %ebx # TRUNCATE movb %bl, %bl movl _block, %esi movb %bl, 1(%esi,%edx) cmpl %eax, _last jge LBB1_2 #codeRepl5.exitStub LBB1_4: #label.0 cmpl $257, %ecx jne LBB1_1 #label.0.no_exit.1_crit_edge.exitStub jmp LBB1_2 #codeRepl5.exitStub ... which is much better layout :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31282 91177308-0d34-0410-b5e6-96231b3b80d8		2006-10-29 21:05:41 +00:00
..
SelectionDAG	fix Generic/2006-10-29-Crash.ll	2006-10-29 21:01:20 +00:00
AsmPrinter.cpp	don't print dead jump tables	2006-10-28 18:10:06 +00:00
BranchFolding.cpp	Make CanFallThrough more intelligent (so it can handle blocks with (e.g.) no	2006-10-29 21:05:41 +00:00
DwarfWriter.cpp	Tighter data structure for deleted debug labels.	2006-10-24 11:50:43 +00:00
ELFWriter.cpp	Refactor a bunch of includes so that TargetMachine.h doesn't have to include	2006-05-12 06:33:49 +00:00
IntrinsicLowering.cpp	For PR950:	2006-10-20 07:07:24 +00:00
LiveInterval.cpp	When joining two intervals where the RHS is really simple, use a light-weight	2006-09-02 05:26:59 +00:00
LiveIntervalAnalysis.cpp	Keep track of the start of MBB's in a separate map from instructions. This	2006-09-15 03:57:23 +00:00
LiveVariables.cpp	Fix for PR929. The PHI nodes were being gone through for each instruction	2006-10-03 07:20:20 +00:00
LLVMTargetMachine.cpp	Don't do dead block elimination in fast mode.	2006-10-24 16:11:49 +00:00
MachineBasicBlock.cpp	add moveBefore/moveAfter helper methods	2006-10-24 00:02:26 +00:00
MachineDebugInfo.cpp	Tighter data structure for deleted debug labels.	2006-10-24 11:50:43 +00:00
MachineFunction.cpp	const'ify jump table stuff	2006-10-28 18:17:09 +00:00
MachineInstr.cpp	be more aggressive about matching identical instructions.	2006-10-25 18:08:14 +00:00
MachinePassRegistry.cpp	Final polish on machine pass registries.	2006-08-02 12:30:23 +00:00
MachOWriter.cpp	Behold, more work on relocations. Things are looking pretty good now.	2006-09-10 23:03:44 +00:00
Makefile	Fix linking on Alpha	2006-07-20 17:27:58 +00:00
Passes.cpp	Work around a bug in gcc 3.3.5, reported by a user	2006-08-03 00:16:56 +00:00
PHIElimination.cpp	"Once more into the breach, dear friends, once more, or fill the wall up	2006-09-28 07:10:24 +00:00
PhysRegTracker.h	Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr	2004-02-23 06:10:13 +00:00
PrologEpilogInserter.cpp	TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.	2006-09-28 18:52:32 +00:00
RegAllocLinearScan.cpp	LinearScanner hotspot.	2006-10-24 14:35:25 +00:00
RegAllocLocal.cpp	Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not	2006-09-19 18:02:01 +00:00
RegAllocSimple.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
TwoAddressInstructionPass.cpp	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00
UnreachableBlockElim.cpp	eliminate RegisterOpt. It does the same thing as RegisterPass.	2006-08-27 22:42:52 +00:00
VirtRegMap.cpp	restore my previous patch, now that the X86 backend bug has been fixed:	2006-10-12 17:45:38 +00:00
VirtRegMap.h	Fix a long-standing wart in the code generator: two-address instruction lowering	2006-09-05 02:12:02 +00:00