Devang Patel a28101e61a Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320] ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149142 91177308-0d34-0410-b5e6-96231b3b80d8		2012-01-27 19:48:28 +00:00
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ARM	Add support for the R_ARM_TARGET1 relocation, which should be given to relocations applied to all C++ constructors and destructors.	2012-01-26 09:25:43 +00:00
AsmParser	The error check for using -g with a .s file already containing dwarf .file	2012-01-11 18:04:47 +00:00
COFF	Add back the MC bits of 126425. Original patch by Nathan Jeffords. I added the	2011-12-17 01:14:52 +00:00
Disassembler	Add disassembler support for VPERMIL2PD and VPERMIL2PS.	2011-12-30 06:23:39 +00:00
ELF	Add support for .cfi_signal_frame. Fixes pr11762.	2012-01-23 21:51:52 +00:00
MachO	ARM Darwin symbol ref differences w/o subsection-via-symbols.	2012-01-24 21:45:25 +00:00
MBlaze	Teach the MBlaze asm parser how to parse special purpose register names.	2010-12-20 20:43:24 +00:00
Mips	Add big endian mips support. Based on a patch by Jack Carter.	2012-01-11 04:04:14 +00:00
X86	Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]	2012-01-27 19:48:28 +00:00