Jim Grosbach a4e3c7fc4b ARM assembly parsing and encoding for VLD2 with writeback. ... Refactor the instructions into fixed writeback and register-stride writeback variants to simplify the offset operand (no more optional register operand using reg0). This is a simpler representation and allows the assembly parser to more easily handle these instructions. Add tests for the instruction variants now supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146278 91177308-0d34-0410-b5e6-96231b3b80d8		2011-12-09 21:28:25 +00:00
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ARM	ARM assembly parsing and encoding for VLD2 with writeback.	2011-12-09 21:28:25 +00:00
AsmParser	Move test to the X86 directory, note the PR number and only run MC once.	2011-10-31 17:23:09 +00:00
COFF	MC/X86/COFF: Allow quotes in names when targeting MS/Windows,	2011-11-29 18:00:06 +00:00
Disassembler	Add several new instructions supported by the latest MicroBlaze.	2011-11-27 05:16:58 +00:00
ELF	Handle reloc_signed_4byte in here. Not doing so was a regression from my	2011-12-09 19:57:29 +00:00
MachO	The second part of support for generating dwarf for assembly source files. This	2011-12-09 18:09:40 +00:00
MBlaze	Teach the MBlaze asm parser how to parse special purpose register names.	2010-12-20 20:43:24 +00:00
X86	Support for encoding all FMA4 instructions and tablegen patterns for all	2011-11-30 22:09:42 +00:00