NAKAMURA Takumi 2811ae66a8 llvm/test/MC/X86/x86_nop.s: Make sure -arch=x86 when -mcpu=geode. ... -mcpu doesn't infer -arch. Consider non-x86 host. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164185 91177308-0d34-0410-b5e6-96231b3b80d8		2012-09-19 00:56:20 +00:00
..
3DNow.s
2011-09-06-NoNewline.s
address-size.s	Fix generation of the address size override prefix. Add assertions for	2012-03-21 05:48:07 +00:00
intel-syntax-2.s	Add newline.	2012-09-10 23:09:27 +00:00
intel-syntax-encoding.s	Add retw and lretw instructions. Also, fix Intel syntax parsing for all	2012-04-11 01:10:53 +00:00
intel-syntax.s	Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.	2012-07-18 04:11:12 +00:00
lit.local.cfg
padlock.s
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s	Make l/q suffixes on AVX forms of scalar convert instructions consistent with their non-AVX forms.	2012-07-26 07:48:28 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-imm-widths.s
x86_64-sse4a.s	Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.	2012-05-29 19:05:25 +00:00
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s
x86_nop.s	llvm/test/MC/X86/x86_nop.s: Make sure -arch=x86 when -mcpu=geode.	2012-09-19 00:56:20 +00:00
x86_operands.s
x86-32-avx.s	Make l/q suffixes on AVX forms of scalar convert instructions consistent with their non-AVX forms.	2012-07-26 07:48:28 +00:00
x86-32-coverage.s	Add aliases for pblendvb, blendvpd, and blendvps instructions with the implicit xmm0 operand specified. Fixes PR13252.	2012-07-03 05:49:45 +00:00
x86-32-fma3.s
x86-32.s	Add retw and lretw instructions. Also, fix Intel syntax parsing for all	2012-04-11 01:10:53 +00:00
x86-64.s	X86: Fix encoding of 'movd %xmm0, %rax'	2012-08-31 00:30:30 +00:00