6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-07 20:57:12 +00:00
Code Issues Projects Releases Wiki Activity
aab59870a4
llvm-6502/lib/Target/R600
History
Chandler Carruth 974a445bd9 Re-sort all of the includes with ./utils/sort_includes.py so that 
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198685 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 11:48:04 +00:00
..
InstPrinter [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen. 2013-11-28 17:04:04 +00:00
MCTargetDesc Don't set unused variable. 2013-12-11 20:40:57 +00:00
TargetInfo Prune redundant dependencies in LLVMBuild.txt. 2013-12-11 00:30:57 +00:00
AMDGPU.h R600: Register AMDGPUCFGStructurizer pass 2013-12-11 17:51:47 +00:00
AMDGPU.td Change the default of AsmWriterClassName and isMCAsmWriter. 2013-12-02 04:55:42 +00:00
AMDGPUAsmPrinter.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
AMDGPUAsmPrinter.h Add a default constructor to get deterministic behavior. 2013-12-05 16:21:17 +00:00
AMDGPUCallingConv.td R600: Use function inputs to represent data stored in gpr 2013-11-11 22:10:24 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
AMDGPUInstrInfo.h R600/SI: Implement spilling of SGPRs v5 2013-11-27 21:23:35 +00:00
AMDGPUInstrInfo.td R600: Add support for ISD::FROUND 2013-11-27 21:23:20 +00:00
AMDGPUInstructions.td R600/SI: Fixing handling of condition codes 2013-11-22 23:07:58 +00:00
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
AMDGPUISelLowering.cpp R600: Allow ftrunc 2013-12-20 05:11:55 +00:00
AMDGPUISelLowering.h Add target hook to prevent folding some bitcasted loads. 2013-11-15 04:42:23 +00:00
AMDGPUMachineFunction.cpp [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
AMDGPUMachineFunction.h [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
AMDGPUMCInstLower.cpp R600: Store disassembly in a special ELF section when feature +DumpCode is enabled. 2013-10-12 05:02:51 +00:00
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
AMDGPURegisterInfo.h R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp Turn AMDGPUSubtarget::getDataLayout into a static function. 2013-12-14 06:13:44 +00:00
AMDGPUSubtarget.h Turn AMDGPUSubtarget::getDataLayout into a static function. 2013-12-14 06:13:44 +00:00
AMDGPUTargetMachine.cpp Factor MI-Sched in preparation for post-ra scheduling support. 2013-12-28 21:56:47 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp Re-sort all of the includes with ./utils/sort_includes.py so that 2014-01-07 11:48:04 +00:00
AMDILBase.td
AMDILCFGStructurizer.cpp Re-sort all of the includes with ./utils/sort_includes.py so that 2014-01-07 11:48:04 +00:00
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelLowering.cpp
AMDILRegisterInfo.td
CMakeLists.txt [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too. 2013-11-28 17:04:31 +00:00
LLVMBuild.txt Add proper dependencies to LLVMBuild.txt in llvm/lib. 2013-12-10 05:39:34 +00:00
Makefile
Processors.td R600: Re-format Processors.td 2013-12-11 17:51:51 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp R600: Workaround for cayman loop bug 2013-12-02 17:29:37 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp R600: Register R600EmitClauseMarkers pass 2013-12-11 17:51:41 +00:00
R600ExpandSpecialInstrs.cpp R600: Fix input modifiers lost for Cayman 2013-12-10 14:43:27 +00:00
R600InstrFormats.td
R600InstrInfo.cpp R600: Implement TargetInstrInfo::isLegalToSplitMBBAt() 2013-11-22 00:41:08 +00:00
R600InstrInfo.h R600: Implement TargetInstrInfo::isLegalToSplitMBBAt() 2013-11-22 00:41:08 +00:00
R600Instructions.td R600: Allow ftrunc 2013-12-20 05:11:55 +00:00
R600Intrinsics.td R600: Reenable llvm.R600.load.input/interp.input for compatibility 2013-11-12 16:26:47 +00:00
R600ISelLowering.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
R600ISelLowering.h R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
R600MachineFunctionInfo.cpp [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
R600MachineFunctionInfo.h [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
R600MachineScheduler.cpp Factor MI-Sched in preparation for post-ra scheduling support. 2013-12-28 21:56:47 +00:00
R600MachineScheduler.h Factor MI-Sched in preparation for post-ra scheduling support. 2013-12-28 21:56:47 +00:00
R600OptimizeVectorRegisters.cpp Re-sort all of the includes with ./utils/sort_includes.py so that 2014-01-07 11:48:04 +00:00
R600Packetizer.cpp R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
R600RegisterInfo.cpp R600: Fix scheduling of instructions that use the LDS output queue 2013-11-15 00:12:45 +00:00
R600RegisterInfo.h R600: Fix scheduling of instructions that use the LDS output queue 2013-11-15 00:12:45 +00:00
R600RegisterInfo.td R600: Simplify handling of private address space 2013-10-22 18:19:10 +00:00
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
SIAnnotateControlFlow.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
SIDefines.h R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
SIFixSGPRCopies.cpp R600/SI: Fix illegal VGPR->SGPR copy inside of loop 2013-11-18 18:50:20 +00:00
SIInsertWaits.cpp R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
SIInstrFormats.td R600/SI: Prefer SALU instructions for bit shift operations 2013-11-13 23:36:37 +00:00
SIInstrInfo.cpp Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies. 2013-12-17 04:50:45 +00:00
SIInstrInfo.h Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
SIInstrInfo.td R600/SI: Make private pointers be 32-bit. 2013-12-19 05:32:55 +00:00
SIInstructions.td R600/SI: Make private pointers be 32-bit. 2013-12-19 05:32:55 +00:00
SIIntrinsics.td
SIISelLowering.cpp R600/SI: Make private pointers be 32-bit. 2013-12-19 05:32:55 +00:00
SIISelLowering.h R600/SI: Implement add i64, but do not yet enable. 2013-11-18 20:09:47 +00:00
SILowerControlFlow.cpp Use llvm_unreachable instead of assert(0) 2013-12-10 21:37:42 +00:00
SIMachineFunctionInfo.cpp R600/SI: Implement spilling of SGPRs v5 2013-11-27 21:23:35 +00:00
SIMachineFunctionInfo.h R600/SI: Implement spilling of SGPRs v5 2013-11-27 21:23:35 +00:00
SIRegisterInfo.cpp R600/SI: Fix moveToVALU when the first operand is VSrc. 2013-11-18 20:09:55 +00:00
SIRegisterInfo.h R600/SI: Add support for private address space load/store 2013-11-13 23:36:50 +00:00
SIRegisterInfo.td R600: Fix handling of vector kernel arguments 2013-10-23 00:44:32 +00:00
SISchedule.td
SITypeRewriter.cpp Re-sort all of the includes with ./utils/sort_includes.py so that 2014-01-07 11:48:04 +00:00