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8be39c81b0
Gather and Scatter are new introduced intrinsics, comming after recently implemented masked load and store.
This is the first patch for Gather and Scatter intrinsics. It includes only the syntax, parsing and verification.
Gather and Scatter intrinsics allow to perform multiple memory accesses (read/write) in one vector instruction.
The intrinsics are not target specific and will have the following syntax:
Gather:
declare <16 x i32> @llvm.masked.gather.v16i32(<16 x i32*> <vector of ptrs>, i32 <alignment>, <16 x i1> <mask>, <16 x i32> <passthru>)
declare <8 x float> @llvm.masked.gather.v8f32(<8 x float*><vector of ptrs>, i32 <alignment>, <8 x i1> <mask>, <8 x float><passthru>)
Scatter:
declare void @llvm.masked.scatter.v8i32(<8 x i32><vector value to be stored> , <8 x i32*><vector of ptrs> , i32 <alignment>, <8 x i1> <mask>)
declare void @llvm.masked.scatter.v16i32(<16 x i32> <vector value to be stored> , <16 x i32*> <vector of ptrs>, i32 <alignment>, <16 x i1><mask> )
Vector of ptrs - a set of source/destination addresses, to load/store the value.
Mask - switches on/off vector lanes to prevent memory access for switched-off lanes
vector of ptrs, value and mask should have the same vector width.
These are code examples where gather / scatter should be used and will allow function vectorization
;void foo1(int * restrict A, int * restrict B, int * restrict C) {
; for (int i=0; i<SIZE; i++) {
; A[i] = B[C[i]];
; }
;}
;void foo3(int * restrict A, int * restrict B) {
; for (int i=0; i<SIZE; i++) {
; A[B[i]] = i+5;
; }
;}
Tests will come in the following patches, with CodeGen and Vectorizer.
http://reviews.llvm.org/D7433
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228521 91177308-0d34-0410-b5e6-96231b3b80d8
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| .. | ||
| AsmMatcherEmitter.cpp | ||
| AsmWriterEmitter.cpp | ||
| AsmWriterInst.cpp | ||
| AsmWriterInst.h | ||
| CallingConvEmitter.cpp | ||
| CMakeLists.txt | ||
| CodeEmitterGen.cpp | ||
| CodeGenDAGPatterns.cpp | ||
| CodeGenDAGPatterns.h | ||
| CodeGenInstruction.cpp | ||
| CodeGenInstruction.h | ||
| CodeGenIntrinsics.h | ||
| CodeGenMapTable.cpp | ||
| CodeGenRegisters.cpp | ||
| CodeGenRegisters.h | ||
| CodeGenSchedule.cpp | ||
| CodeGenSchedule.h | ||
| CodeGenTarget.cpp | ||
| CodeGenTarget.h | ||
| CTagsEmitter.cpp | ||
| DAGISelEmitter.cpp | ||
| DAGISelMatcher.cpp | ||
| DAGISelMatcher.h | ||
| DAGISelMatcherEmitter.cpp | ||
| DAGISelMatcherGen.cpp | ||
| DAGISelMatcherOpt.cpp | ||
| DFAPacketizerEmitter.cpp | ||
| DisassemblerEmitter.cpp | ||
| FastISelEmitter.cpp | ||
| FixedLenDecoderEmitter.cpp | ||
| InstrInfoEmitter.cpp | ||
| IntrinsicEmitter.cpp | ||
| LLVMBuild.txt | ||
| Makefile | ||
| module.modulemap | ||
| OptParserEmitter.cpp | ||
| PseudoLoweringEmitter.cpp | ||
| RegisterInfoEmitter.cpp | ||
| SequenceToOffsetTable.h | ||
| SubtargetEmitter.cpp | ||
| TableGen.cpp | ||
| TableGenBackends.h | ||
| tdtags | ||
| X86DisassemblerShared.h | ||
| X86DisassemblerTables.cpp | ||
| X86DisassemblerTables.h | ||
| X86ModRMFilters.cpp | ||
| X86ModRMFilters.h | ||
| X86RecognizableInstr.cpp | ||
| X86RecognizableInstr.h | ||