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b0636041c8
llvm-6502/lib/Target
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Duraid Madina b0636041c8 fix stack corruption! Previously, 16-byte whole-FP-register stores were 
being treated as needing only 8 bytes (though they were 16 byte aligned.)

This should fix a bunch of tests - anyone have any comments, though?

  - in Target.td , SpillSize and SpillAlignment seem dead - is this what
    Size and Alignment do now?
  - in CodeGenRegisters.h/CodeGenTarget.cpp , DeclaredSpillSize and
    DeclaredSpillAlignment seem dead.
  - there are a bunch of comments here and there that don't clearly
    distinguish between 'size' and 'spillsize' etc. hmm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25644 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 09:45:03 +00:00
..
Alpha minor renaming 2006-01-26 03:24:15 +00:00
CBackend Make the C writer work with packed types. printContainedStructs is 2006-01-20 20:43:57 +00:00
IA64 fix stack corruption! Previously, 16-byte whole-FP-register stores were 2006-01-26 09:45:03 +00:00
PowerPC Set SchedulingForLatency to be the default scheduling preference for all. 2006-01-25 18:52:42 +00:00
Skeleton Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
Sparc Rest of subtarget support, remove references to ppc 2006-01-26 07:22:22 +00:00
SparcV8 Rest of subtarget support, remove references to ppc 2006-01-26 07:22:22 +00:00
SparcV9 Add explicit #includes of <iostream> 2006-01-22 23:41:00 +00:00
X86 Work around some x86 Darwin assembler bugs 2006-01-26 02:27:43 +00:00
Makefile DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now 2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp Preparation of supporting scheduling info. Need to find info based on selected 2005-10-25 15:15:28 +00:00
Target.td New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 2006-01-09 18:28:21 +00:00
TargetData.cpp Implement a new InvalidateStructLayoutInfo method and add some comments 2006-01-14 00:07:34 +00:00
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td add a marker 2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td bswap implementation 2006-01-14 03:14:10 +00:00
TargetSubtarget.cpp