llvm-6502/test/CodeGen
Evan Cheng 438d9900c0 Catch more coalescing opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76282 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 04:52:23 +00:00
..
Alpha Make promotion in operation legalization for SETCC work correctly. 2009-07-17 05:16:04 +00:00
ARM fix an arm codegen bug (the same as PR4482 on ppc) where available_externally 2009-07-15 04:12:33 +00:00
CBackend
CellSPU
CPP
Generic remove tests for removed intrinsics. 2009-07-12 21:30:06 +00:00
IA64
Mips
MSP430
PowerPC Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands. 2009-07-16 20:58:34 +00:00
SPARC
SystemZ Enable cross register class coalescing. 2009-07-18 02:10:10 +00:00
Thumb Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible. 2009-07-11 07:08:13 +00:00
Thumb2 Emit cross regclass register moves for thumb2. 2009-07-16 23:26:06 +00:00
X86 Catch more coalescing opportunities. 2009-07-18 04:52:23 +00:00
XCore Combine an unaligned store of unaligned load into a memmove. 2009-07-16 12:50:48 +00:00