llvm-6502/test/MC/Disassembler/X86
Rafael Espindola 378981499a Fix the operand encoding in the test instruction.
Fixes pr22995.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 12:31:55 +00:00
..
avx-512.txt [X86] Fix diassembler crash on AVX512 cmpps/cmppd with immediate that doesn't fit in 5-bits. Fixes PR22743. 2015-03-02 00:22:29 +00:00
fp-stack.txt
hex-immediates.txt
intel-syntax-32.txt [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized. 2015-01-08 07:41:30 +00:00
intel-syntax.txt [X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized. 2015-01-08 07:41:30 +00:00
invalid-VEX-vvvv.txt
lit.local.cfg
marked-up.txt
missing-sib.txt
moffs.txt [X86] Make the instructions that use AdSize16/32/64 co-exist together without using mode predicates. 2015-01-02 07:02:25 +00:00
padlock.txt
prefixes.txt [X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present. 2015-01-03 00:00:20 +00:00
simple-tests.txt [X86] Add support for parsing and printing the mnemonic aliases for the XOP VPCOM instructions. 2015-02-13 07:42:25 +00:00
truncated-input.txt
x86-16.txt Fix the operand encoding in the test instruction. 2015-03-31 12:31:55 +00:00
x86-32.txt [X86] Add GETSEC instruction. 2015-02-07 23:36:36 +00:00
x86-64.txt [X86] Add some missing redundant MMX and SSE encodings for disassembler. 2015-02-22 07:50:41 +00:00