llvm-6502/test/MC/Disassembler
Hal Finkel 184f8f7c10 [PowerPC] Enable printing instructions using aliases
TableGen had been nicely generating code to print a number of instructions using
shorter aliases (and PowerPC has plenty of short mnemonics), but we were not
calling it. For some of the aliases we support in the parser, TableGen can't
infer the "inverse" alias relationship, so there is still more to do.

Thus, after some hours of updating test cases...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235616 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-23 18:30:38 +00:00
..
AArch64 [AArch64] LORID_EL1 register must be treated as read-only 2015-04-20 16:54:37 +00:00
ARM [ARM] Add v8.1a "Privileged Access Never" extension 2015-04-16 11:34:25 +00:00
Hexagon [Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests. 2015-02-03 19:15:11 +00:00
Mips [mips][microMIPSr6] Implement CACHE and PREF instructions 2015-04-21 11:17:25 +00:00
PowerPC [PowerPC] Enable printing instructions using aliases 2015-04-23 18:30:38 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ [SystemZ] Support transactional execution on zEC12 2015-04-01 12:51:43 +00:00
X86 Fix the operand encoding in the test instruction. 2015-03-31 12:31:55 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00