Jakob Stoklund Olesen b8ac3b035b Revert "Replace a big gob of old coalescer logic with the new CoalescerPair class." ... Whiny buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106710 91177308-0d34-0410-b5e6-96231b3b80d8		2010-06-24 00:52:22 +00:00
..
Analysis.h
AsmPrinter.h
BinaryObject.h
CalcSpillWeights.h
CallingConvLower.h
FastISel.h	Teach regular and fast isel to set dead flags on unused implicit defs	2010-06-18 23:28:01 +00:00
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h	Grammar.	2010-06-18 17:40:42 +00:00
JITCodeEmitter.h
LatencyPriorityQueue.h	Eliminate the use of PriorityQueue and just use a std::vector,	2010-05-26 18:52:00 +00:00
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h	Remove the local register allocator.	2010-06-15 21:58:33 +00:00
LiveInterval.h	Let SmallVector take advantage of LiveRange's podness.	2010-06-13 12:52:38 +00:00
LiveIntervalAnalysis.h	Revert "Replace a big gob of old coalescer logic with the new CoalescerPair class."	2010-06-24 00:52:22 +00:00
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h	Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out	2010-06-22 17:25:57 +00:00
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h	Add explicit keywords.	2010-06-18 19:04:37 +00:00
MachineFunction.h	Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by	2010-05-26 19:46:12 +00:00
MachineFunctionAnalysis.h
MachineFunctionPass.h	Make MachineFunctionPass::createPrinterPass private, as no subclasses	2010-06-05 01:19:12 +00:00
MachineInstr.h	Teach regular and fast isel to set dead flags on unused implicit defs	2010-06-18 23:28:01 +00:00
MachineInstrBuilder.h
MachineJumpTableInfo.h	Add explicit keywords.	2010-06-18 19:04:37 +00:00
MachineLocation.h
MachineLoopInfo.h	Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out	2010-06-22 17:25:57 +00:00
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h	Add a TargetRegisterInfo::composeSubRegIndices hook with a default	2010-05-28 18:18:53 +00:00
MachinePassRegistry.h
MachineRegisterInfo.h	Start TargetRegisterClass indices at 0 instead of 1, so that	2010-06-18 18:13:55 +00:00
MachineRelocation.h
MachineSSAUpdater.h
MachORelocation.h
ObjectCodeEmitter.h
Passes.h	Remove the local register allocator.	2010-06-15 21:58:33 +00:00
PostRAHazardRecognizer.h	Add missing include to unbreak the build.	2010-06-14 22:44:26 +00:00
ProcessImplicitDefs.h
PseudoSourceValue.h
RegAllocRegistry.h
RegisterCoalescer.h	Revert "Replace a big gob of old coalescer logic with the new CoalescerPair class."	2010-06-24 00:52:22 +00:00
RegisterScavenging.h
RuntimeLibcalls.h	back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)	2010-06-18 23:03:10 +00:00
ScheduleDAG.h	Change push_all to a non-virtual function and implement it in the	2010-05-26 01:10:55 +00:00
ScheduleHazardRecognizer.h
SchedulerRegistry.h	Add a hybrid bottom up scheduler that reduce register usage while avoiding	2010-05-20 06:13:19 +00:00
SelectionDAG.h	Change UpdateNodeOperands' operand and return value from SDValue to	2010-06-18 15:30:29 +00:00
SelectionDAGISel.h	Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.	2010-06-23 17:09:26 +00:00
SelectionDAGNodes.h	Teach regular and fast isel to set dead flags on unused implicit defs	2010-06-18 23:28:01 +00:00
SlotIndexes.h
TargetLoweringObjectFileImpl.h	More data/parsing support for tls directives. Add a few more testcases	2010-05-17 22:53:55 +00:00
ValueTypes.h	Fix enum to address array bounds regression.	2010-05-18 21:22:12 +00:00
ValueTypes.td	Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.	2010-05-13 23:55:47 +00:00