llvm-6502/lib/CodeGen
Andrew Trick bacb24975d MI-Sched: Rename IssueCount to CurrMOps.
"Counts" refer to scaled resource counts within a region. CurrMOps is
simply the number of micro-ops to be issue in the current cycle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-15 04:49:49 +00:00
..
AsmPrinter Debug Info: Don't print the display name and colon prefix for DEBUG_VALUE comments if the display name is empty 2013-06-15 00:33:47 +00:00
SelectionDAG SelectionDAG: slightly refactor DAGCombiner::visitSELECT_CC to avoid redudant checks... 2013-06-15 04:03:33 +00:00
AggressiveAntiDepBreaker.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
AggressiveAntiDepBreaker.h Sort includes for all of the .h files under the 'lib' tree. These were 2012-12-04 07:12:27 +00:00
AllocationOrder.cpp Assert that the target provided hints are in the allocation order. 2013-02-19 18:41:01 +00:00
AllocationOrder.h Limit the search space in RAGreedy::tryEvict(). 2013-01-12 00:57:44 +00:00
Analysis.cpp Only pass 'returned' to target-specific lowering code when the value of entire register is guaranteed to be preserved. 2013-04-30 22:49:28 +00:00
AntiDepBreaker.h
BasicTargetTransformInfo.cpp Loop Strength Reduce: Scaling factor cost. 2013-05-31 21:29:03 +00:00
BranchFolding.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
BranchFolding.h
CalcSpillWeights.cpp typo 2013-04-06 04:24:12 +00:00
CallingConvLower.cpp For ARM backend, fixed "byval" attribute support. 2013-05-05 07:48:36 +00:00
CMakeLists.txt Remove the old CodePlacementOpt pass. 2013-03-29 17:14:24 +00:00
CodeGen.cpp This patch breaks up Wrap.h so that it does not have to include all of 2013-05-01 20:59:00 +00:00
CriticalAntiDepBreaker.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
CriticalAntiDepBreaker.h This patch addresses bug 15031. 2013-01-28 18:36:58 +00:00
DeadMachineInstructionElim.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
DFAPacketizer.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
DwarfEHPrepare.cpp Remove useless code from transitioning to new EH scheme 2013-05-31 16:30:36 +00:00
EarlyIfConversion.cpp Allow MachineTraceMetrics to be used when the model has no resources. 2013-04-02 22:27:45 +00:00
EdgeBundles.cpp
ErlangGC.cpp Add a GC plugin for Erlang 2013-03-25 13:47:46 +00:00
ExecutionDepsFix.cpp Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. 2013-05-24 22:23:49 +00:00
ExpandISelPseudos.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
ExpandPostRAPseudos.cpp Re-apply r175688, with the changes suggested by Jakob in PR15320. 2013-02-21 22:16:43 +00:00
GCMetadata.cpp Fix GCMetadaPrinter::finishAssembly not executed, patch by Yiannis Tsiouris. 2013-02-19 16:51:44 +00:00
GCMetadataPrinter.cpp
GCStrategy.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
IfConversion.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
InlineSpiller.cpp InlineSpiller: Store bucket pointers instead of iterators. 2013-05-23 15:42:57 +00:00
InterferenceCache.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
InterferenceCache.h Make the LiveRegMatrix analysis available to targets. 2012-11-28 19:13:06 +00:00
IntrinsicLowering.cpp Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen. 2013-05-21 14:37:16 +00:00
JITCodeEmitter.cpp
LatencyPriorityQueue.cpp
LexicalScopes.cpp Correct indentation for dumping LexicalScope. 2013-02-02 00:02:03 +00:00
LiveDebugVariables.cpp Temporarily revert "Change the informal convention of DBG_VALUE so that we can express a" 2013-04-30 22:35:14 +00:00
LiveDebugVariables.h Clean up LDV, no functionality change. 2013-02-13 20:23:48 +00:00
LiveInterval.cpp Fix PR16110: Handle DBG_VALUE in ConnectedVNInfoEqClasses::Distribute(). 2013-05-23 17:02:23 +00:00
LiveIntervalAnalysis.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 22:36:55 +00:00
LiveIntervalUnion.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
LiveRangeCalc.cpp Copy single reaching defs directly into the LiveInterval. 2013-02-20 23:08:26 +00:00
LiveRangeCalc.h Copy single reaching defs directly into the LiveInterval. 2013-02-20 23:08:26 +00:00
LiveRangeEdit.cpp Add some constantness. 2013-03-18 23:40:46 +00:00
LiveRegMatrix.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
LiveStackAnalysis.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
LiveVariables.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 22:26:05 +00:00
LLVMBuild.txt Extracted ObjCARC.cpp into its own library libLLVMObjCARCOpts in preparation for refactoring the ARC Optimizer. 2013-01-28 01:35:51 +00:00
LLVMTargetMachine.cpp Add space to assert message. 2013-06-05 23:13:26 +00:00
LocalStackSlotAllocation.cpp LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
MachineBasicBlock.cpp Optimize MachineBasicBlock::getSymbol by caching the symbol. Since the symbol 2013-04-22 21:21:08 +00:00
MachineBlockFrequencyInfo.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
MachineBlockPlacement.cpp Fix a defect in code-layout pass, improving Benchmarks/Olden/em3d/em3d by about 30% 2013-06-04 01:00:57 +00:00
MachineBranchProbabilityInfo.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
MachineCodeEmitter.cpp
MachineCopyPropagation.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
MachineCSE.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
MachineDominators.cpp
MachineFunction.cpp Print ConstantPool entries initialized to Values with WriteAsOperand instead of 2013-06-12 22:19:19 +00:00
MachineFunctionAnalysis.cpp
MachineFunctionPass.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
MachineFunctionPrinterPass.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
MachineInstr.cpp Remove liveout lists from MachineRegisterInfo. 2013-02-05 18:21:56 +00:00
MachineInstrBundle.cpp Move an assertion so it doesn't dereference end(). 2013-01-04 22:17:31 +00:00
MachineLICM.cpp Split TargetLowering into a CodeGen and a SelectionDAG part. 2013-01-11 20:05:37 +00:00
MachineLoopInfo.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
MachineModuleInfo.cpp Remove addFrameMove. 2013-05-16 21:02:15 +00:00
MachineModuleInfoImpls.cpp Rename virtual table anchors from Anchor() to anchor() for consistency with the rest of the tree. 2012-09-26 06:36:36 +00:00
MachinePassRegistry.cpp
MachinePostDominators.cpp Add a MachinePostDominator pass 2012-09-17 14:08:37 +00:00
MachineRegisterInfo.cpp Add an MRI::verifyUseLists() function. 2013-04-19 21:40:57 +00:00
MachineScheduler.cpp MI-Sched: Rename IssueCount to CurrMOps. 2013-06-15 04:49:49 +00:00
MachineSink.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
MachineSSAUpdater.cpp Use MachineInstrBuilder in a few CodeGen passes. 2012-12-20 18:08:06 +00:00
MachineTraceMetrics.cpp Generalize the MachineTraceMetrics public API. 2013-04-27 03:54:20 +00:00
MachineVerifier.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
Makefile
OcamlGC.cpp
OptimizePHIs.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
Passes.cpp The DWARF EH pass doesn't need the TargetMachine, only the TargetLoweringBase like the other EH passes. 2013-05-20 21:54:18 +00:00
PeepholeOptimizer.cpp Add debug prints for when optimizeLoadInstr folds a load. 2012-12-17 03:56:00 +00:00
PHIElimination.cpp Don't rely on the isDead() MachineOperand flag when updating LiveIntervals. 2013-02-21 08:51:58 +00:00
PHIEliminationUtils.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
PHIEliminationUtils.h
PostRASchedulerList.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
ProcessImplicitDefs.cpp
PrologEpilogInserter.cpp Make PrologEpilogInserter save/restore all callee saved registers 2013-06-14 16:15:29 +00:00
PrologEpilogInserter.h Sort includes for all of the .h files under the 'lib' tree. These were 2012-12-04 07:12:27 +00:00
PseudoSourceValue.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
README.txt Correct wrong register in this example, pointed out by Baoshan Pang. 2013-06-07 08:30:55 +00:00
RegAllocBase.cpp Make the LiveRegMatrix analysis available to targets. 2012-11-28 19:13:06 +00:00
RegAllocBase.h Sort includes for all of the .h files under the 'lib' tree. These were 2012-12-04 07:12:27 +00:00
RegAllocBasic.cpp Replace uses of the deprecated std::auto_ptr with OwningPtr. 2013-04-12 10:56:28 +00:00
RegAllocFast.cpp Make RAFast::UsedInInstr indexed by register units. 2013-02-21 19:35:21 +00:00
RegAllocGreedy.cpp Use only explicit bool conversion operators 2013-05-15 07:36:59 +00:00
RegAllocPBQP.cpp Replace uses of the deprecated std::auto_ptr with OwningPtr. 2013-04-15 12:06:32 +00:00
RegisterClassInfo.cpp Precompute some information about register costs. 2013-01-12 00:54:59 +00:00
RegisterCoalescer.cpp Mark rematerialized super/sub registers as dead. 2013-06-14 20:22:21 +00:00
RegisterCoalescer.h
RegisterPressure.cpp Replace erase loop with std::remove_if. 2013-02-16 17:06:38 +00:00
RegisterScavenging.cpp Simplify logic now that r182490 is in place. No functional change intended. 2013-05-22 23:17:36 +00:00
ScheduleDAG.cpp Scheduler diagnostics. Print the register name. 2013-03-01 00:19:14 +00:00
ScheduleDAGInstrs.cpp MI-Sched: schedule physreg copies. 2013-04-13 06:07:40 +00:00
ScheduleDAGPrinter.cpp ScheduleDAG: colorize the DOT graph and improve formatting. 2013-01-25 07:45:25 +00:00
ScoreboardHazardRecognizer.cpp Release build: guard dump functions with 2012-09-11 22:23:19 +00:00
ShadowStackGC.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
ShrinkWrapping.cpp Add ArrayRef constructor from None, and do the cleanups that this constructor enables 2013-05-05 00:40:33 +00:00
SjLjEHPrepare.cpp Add bitcast to store of personality function. 2013-05-14 16:30:51 +00:00
SlotIndexes.cpp Make some fixes for LiveInterval repair with debug info. Debug value 2013-02-23 10:25:25 +00:00
Spiller.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
Spiller.h
SpillPlacement.cpp Move #include of BitVector from .h to .cpp file. 2013-03-18 23:45:45 +00:00
SpillPlacement.h
SplitKit.cpp Make the LiveRegMatrix analysis available to targets. 2012-11-28 19:13:06 +00:00
SplitKit.h
StackColoring.cpp Fix miscompile due to StackColoring incorrectly merging stack slots (PR15707) 2013-05-15 21:15:09 +00:00
StackProtector.cpp Support OpenBSD's native frame protection conventions. 2013-06-07 16:35:57 +00:00
StackSlotColoring.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
StrongPHIElimination.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
TailDuplication.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
TargetFrameLoweringImpl.cpp Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
TargetInstrInfo.cpp Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration. 2013-02-12 21:21:59 +00:00
TargetLoweringBase.cpp Add LLVMContext argument to getSetCCResultType 2013-05-18 00:21:46 +00:00
TargetLoweringObjectFileImpl.cpp Micro-optimization 2013-04-26 21:15:08 +00:00
TargetOptionsImpl.cpp Remove exception handling support from the old JIT. 2013-05-07 20:53:59 +00:00
TargetRegisterInfo.cpp Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. 2013-05-24 22:23:49 +00:00
TargetSchedule.cpp MI-Sched cleanup. If an instruction has no valid sched class, do not attempt to check for a variant. 2013-04-13 06:07:45 +00:00
TwoAddressInstructionPass.cpp TiedTo flag can now be placed on implicit operands. isTwoAddrUse() should look 2013-05-02 02:07:32 +00:00
UnreachableBlockElim.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
VirtRegMap.cpp Remove VirtRegMap::getRegAllocPref(). 2012-12-04 00:35:59 +00:00

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str r4, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.