mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
ba567d670d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138872 91177308-0d34-0410-b5e6-96231b3b80d8
129 lines
2.6 KiB
LLVM
129 lines
2.6 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s
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define i64 @test1(i64* %ptr, i64 %val) {
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; CHECK: test1
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; CHECK: dmb ish
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; CHECK: ldrexd r2, r3
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; CHECK: adds r0, r2
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; CHECK: adc r1, r3
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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%r = atomicrmw add i64* %ptr, i64 %val seq_cst
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ret i64 %r
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}
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define i64 @test2(i64* %ptr, i64 %val) {
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; CHECK: test2
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; CHECK: dmb ish
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; CHECK: ldrexd r2, r3
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; CHECK: subs r0, r2
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; CHECK: sbc r1, r3
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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%r = atomicrmw sub i64* %ptr, i64 %val seq_cst
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ret i64 %r
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}
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define i64 @test3(i64* %ptr, i64 %val) {
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; CHECK: test3
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; CHECK: dmb ish
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; CHECK: ldrexd r2, r3
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; CHECK: and r0, r2
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; CHECK: and r1, r3
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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%r = atomicrmw and i64* %ptr, i64 %val seq_cst
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ret i64 %r
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}
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define i64 @test4(i64* %ptr, i64 %val) {
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; CHECK: test4
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; CHECK: dmb ish
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; CHECK: ldrexd r2, r3
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; CHECK: orr r0, r2
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; CHECK: orr r1, r3
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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%r = atomicrmw or i64* %ptr, i64 %val seq_cst
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ret i64 %r
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}
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define i64 @test5(i64* %ptr, i64 %val) {
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; CHECK: test5
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; CHECK: dmb ish
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; CHECK: ldrexd r2, r3
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; CHECK: eor r0, r2
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; CHECK: eor r1, r3
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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%r = atomicrmw xor i64* %ptr, i64 %val seq_cst
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ret i64 %r
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}
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define i64 @test6(i64* %ptr, i64 %val) {
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; CHECK: test6
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; CHECK: dmb ish
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; CHECK: ldrexd r2, r3
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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%r = atomicrmw xchg i64* %ptr, i64 %val seq_cst
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ret i64 %r
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}
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define i64 @test7(i64* %ptr, i64 %val1, i64 %val2) {
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; CHECK: test7
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; CHECK: dmb ish
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; CHECK: ldrexd r2, r3
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; CHECK: cmp r2
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; CHECK: cmpeq r3
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; CHECK: bne
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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%r = cmpxchg i64* %ptr, i64 %val1, i64 %val2 seq_cst
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ret i64 %r
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}
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; Compiles down to cmpxchg
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; FIXME: Should compile to a single ldrexd
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define i64 @test8(i64* %ptr) {
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; CHECK: test8
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; CHECK: ldrexd r2, r3
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; CHECK: cmp r2
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; CHECK: cmpeq r3
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; CHECK: bne
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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%r = load atomic i64* %ptr seq_cst, align 8
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ret i64 %r
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}
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; Compiles down to atomicrmw xchg; there really isn't any more efficient
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; way to write it.
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define void @test9(i64* %ptr, i64 %val) {
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; CHECK: test9
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; CHECK: dmb ish
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; CHECK: ldrexd r2, r3
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; CHECK: strexd {{[a-z0-9]+}}, r0, r1
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; CHECK: cmp
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; CHECK: bne
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; CHECK: dmb ish
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store atomic i64 %val, i64* %ptr seq_cst, align 8
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ret void
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}
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