Benjamin Kramer 1386e9b7b1 Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. ... This required light surgery on the assembler and disassembler because the instructions use an uncommon encoding. They are the only two instructions in x86 that use register operands and two immediates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8		2012-05-29 19:05:25 +00:00
..
3DNow.s
2011-09-06-NoNewline.s
address-size.s	Fix generation of the address size override prefix. Add assertions for	2012-03-21 05:48:07 +00:00
intel-syntax-2.s	Intel syntax. Support .intel_syntax directive.	2012-01-30 20:02:42 +00:00
intel-syntax-encoding.s	Add retw and lretw instructions. Also, fix Intel syntax parsing for all	2012-04-11 01:10:53 +00:00
intel-syntax.s	Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]	2012-01-27 19:48:28 +00:00
lit.local.cfg	test/MC/X86/lit.local.cfg: Fix up to detect 'X86' in targets.	2012-03-09 14:52:38 +00:00
padlock.s
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s	Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.	2012-04-03 05:20:24 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-imm-widths.s
x86_64-sse4a.s	Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.	2012-05-29 19:05:25 +00:00
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s	Added a missing error check for X86 assembly with mismatched base and index	2012-03-12 21:32:09 +00:00
x86_operands.s
x86-32-avx.s
x86-32-coverage.s	Add vmfunc instruction to X86 assembler and disassembler.	2012-02-19 01:39:49 +00:00
x86-32-fma3.s
x86-32.s	Add retw and lretw instructions. Also, fix Intel syntax parsing for all	2012-04-11 01:10:53 +00:00
x86-64.s	Add retw and lretw instructions. Also, fix Intel syntax parsing for all	2012-04-11 01:10:53 +00:00