Chris Lattner c4769bb529 implement vastart. The dag isel compiles this: ... void test3(va_list Y); void test2(int F, ...) { va_list X; va_start(X, F); test3(X); } into this: test2: save -104, %o6, %o6 st %i5, [%i6+88] st %i4, [%i6+84] st %i3, [%i6+80] st %i2, [%i6+76] st %i1, [%i6+72] add %i6, 72, %o0 st %o0, [%i6+-4] call test3 nop restore %g0, %g0, %g0 retl nop The simple isel emits: test2: save -96, %o6, %o6 st %i0, [%i6+68] st %i1, [%i6+72] st %i2, [%i6+76] st %i3, [%i6+80] st %i4, [%i6+84] st %i5, [%i6+88] or %g0, 1, %l0 or %g0, 4, %l1 umul %l0, %l1, %l0 add %l0, 7, %l0 and %l0, -8, %l0 sub %o6, %l0, %o6 add %o6, 96, %l0 add %i6, 72, %l1 st %l1, [%l0] ld [%l0], %o0 call test3 nop restore %g0, %g0, %g0 retl nop git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24985 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-23 06:24:04 +00:00
..
Alpha	remove dead code	2005-12-22 21:16:08 +00:00
CBackend	do not allow '.' in symbol names	2005-11-10 21:39:29 +00:00
IA64	remove dead code	2005-12-22 21:16:08 +00:00
PowerPC	make sure bit_converts are expanded	2005-12-23 05:13:35 +00:00
Skeleton	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
Sparc	implement vastart. The dag isel compiles this:	2005-12-23 06:24:04 +00:00
SparcV8	implement vastart. The dag isel compiles this:	2005-12-23 06:24:04 +00:00
SparcV9	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
X86	make sure bit_convert's are expanded	2005-12-23 05:15:23 +00:00
Makefile	DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now	2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp	Rename MRegisterDesc -> TargetRegisterDesc for consistency	2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp	Preparation of supporting scheduling info. Need to find info based on selected	2005-10-25 15:15:28 +00:00
Target.td	Added support to specify predicates.	2005-12-14 22:02:59 +00:00
TargetData.cpp	Update to use the new MathExtras.h support for log2 computation.	2005-08-02 19:26:06 +00:00
TargetFrameInfo.cpp	Eliminate all remaining tabs and trailing spaces.	2005-07-27 06:12:32 +00:00
TargetInstrInfo.cpp	Convert tabs to spaces	2005-04-22 17:54:37 +00:00
TargetMachine.cpp	Remove the X86 and PowerPC Simple instruction selectors; their time has	2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp	Convert tabs to spaces	2005-04-22 17:54:37 +00:00
TargetSchedule.td	add a marker	2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td	Added special flag node FLAG.	2005-12-22 02:25:14 +00:00
TargetSubtarget.cpp	Eliminate all remaining tabs and trailing spaces.	2005-07-27 06:12:32 +00:00