llvm-6502/lib/Target/Sparc
Chris Lattner c4769bb529 implement vastart. The dag isel compiles this:
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24985 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 06:24:04 +00:00
..
.cvsignore ignore generated files 2005-09-07 23:47:44 +00:00
DelaySlotFiller.cpp Remove trailing whitespace 2005-04-21 23:30:14 +00:00
FPMover.cpp add fneg/fabs support for doubles 2005-12-19 00:50:12 +00:00
Makefile Add the framework for a dag-dag isel 2005-12-17 07:47:01 +00:00
README.txt remove benchmark list, remove issues addressed by the dag-dag isel 2005-12-23 06:09:30 +00:00
Sparc.h Add the framework for a dag-dag isel 2005-12-17 07:47:01 +00:00
Sparc.td Adjust paths: Sparc/V8 --> SparcV8 2004-12-10 04:48:57 +00:00
SparcAsmPrinter.cpp The sun assembler only supports .xword in V9 mode. 2005-12-18 23:36:45 +00:00
SparcInstrFormats.td Push ops list, asm string, and pattern all the way up to InstV8. Move the 2005-12-18 08:21:00 +00:00
SparcInstrInfo.cpp Tighten up some checks 2005-12-18 06:40:34 +00:00
SparcInstrInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
SparcInstrInfo.td fix the int<->fp instructions, which apparently take a single float register 2005-12-23 05:00:16 +00:00
SparcISelDAGToDAG.cpp implement vastart. The dag isel compiles this: 2005-12-23 06:24:04 +00:00
SparcRegisterInfo.cpp Reserve G1 for frame offset stuff and use it to handle large stack frames. 2005-12-20 07:56:31 +00:00
SparcRegisterInfo.h Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcRegisterInfo.td Reserve G1 for frame offset stuff and use it to handle large stack frames. 2005-12-20 07:56:31 +00:00
SparcTargetMachine.cpp Run lower-switch after lower-invoke. 2005-12-20 08:00:11 +00:00
SparcTargetMachine.h Remove JIT support, which doesn't work. 2005-12-16 06:06:07 +00:00
SparcV8ISelSimple.cpp Elimiante SP and FP, which weren't members of the IntRegs register class 2005-12-19 00:06:52 +00:00

Meta TODO list:
1. Create a new DAG -> DAG instruction selector, by adding patterns to the
   instructions.
2. ???
3. profit!

To-do
-----

* open code 64-bit shifts
* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.