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void test3(va_list Y); void test2(int F, ...) { va_list X; va_start(X, F); test3(X); } into this: test2: save -104, %o6, %o6 st %i5, [%i6+88] st %i4, [%i6+84] st %i3, [%i6+80] st %i2, [%i6+76] st %i1, [%i6+72] add %i6, 72, %o0 st %o0, [%i6+-4] call test3 nop restore %g0, %g0, %g0 retl nop The simple isel emits: test2: save -96, %o6, %o6 st %i0, [%i6+68] st %i1, [%i6+72] st %i2, [%i6+76] st %i3, [%i6+80] st %i4, [%i6+84] st %i5, [%i6+88] or %g0, 1, %l0 or %g0, 4, %l1 umul %l0, %l1, %l0 add %l0, 7, %l0 and %l0, -8, %l0 sub %o6, %l0, %o6 add %o6, 96, %l0 add %i6, 72, %l1 st %l1, [%l0] ld [%l0], %o0 call test3 nop restore %g0, %g0, %g0 retl nop git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24985 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
.cvsignore | ||
DelaySlotFiller.cpp | ||
FPMover.cpp | ||
Makefile | ||
README.txt | ||
Sparc.h | ||
Sparc.td | ||
SparcAsmPrinter.cpp | ||
SparcInstrFormats.td | ||
SparcInstrInfo.cpp | ||
SparcInstrInfo.h | ||
SparcInstrInfo.td | ||
SparcISelDAGToDAG.cpp | ||
SparcRegisterInfo.cpp | ||
SparcRegisterInfo.h | ||
SparcRegisterInfo.td | ||
SparcTargetMachine.cpp | ||
SparcTargetMachine.h | ||
SparcV8ISelSimple.cpp |
Meta TODO list: 1. Create a new DAG -> DAG instruction selector, by adding patterns to the instructions. 2. ??? 3. profit! To-do ----- * open code 64-bit shifts * Keep the address of the constant pool in a register instead of forming its address all of the time. * We can fold small constant offsets into the %hi/%lo references to constant pool addresses as well.