Hal Finkel c482454e3c Create an new preheader in PPCCTRLoops to avoid counter register clobbers ... Some IR-level instructions (such as FP <-> i64 conversions) are not chained w.r.t. the mtctr intrinsic and yet may become function calls that clobber the counter register. At the selection-DAG level, these might be reordered with the mtctr intrinsic causing miscompiles. To avoid this situation, if an existing preheader has instructions that might use the counter register, create a new preheader for the mtctr intrinsic. This extra block will be remerged with the old preheader at the MI level, but will prevent unwanted reordering at the selection-DAG level. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182045 91177308-0d34-0410-b5e6-96231b3b80d8		2013-05-16 19:58:38 +00:00
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AArch64	Add more test coverage for addFrameMove.	2013-05-16 15:18:50 +00:00
ARM	ARM ISel: Don't create illegal types during LowerMUL	2013-05-14 22:33:24 +00:00
CPP	test commit: remove blank line.	2013-03-14 05:43:59 +00:00
Generic	TBAA: remove !tbaa from testing cases if not used.	2013-04-30 17:52:57 +00:00
Hexagon	Hexagon: Pass to replace tranfer/copy instructions into combine instruction	2013-05-14 18:54:06 +00:00
Inputs	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
MBlaze	Remove unnecessary leading comment characters in lit-only file	2013-03-18 22:08:16 +00:00
Mips	[mips] Test case for r182042. Add comment.	2013-05-16 19:57:23 +00:00
MSP430	DAGCombiner: Simplify inverted bit tests	2013-05-08 06:44:42 +00:00
NVPTX	[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.	2013-03-30 14:29:30 +00:00
PowerPC	Create an new preheader in PPCCTRLoops to avoid counter register clobbers	2013-05-16 19:58:38 +00:00
R600	R600/SI: Add lit test coverage for the remaining patterns added recently	2013-05-14 09:53:30 +00:00
SI
SPARC	Recognize sparc64 as an alias for sparcv9 triples.	2013-05-14 17:47:27 +00:00
SystemZ	[SystemZ] Make use of SUBTRACT HALFWORD	2013-05-15 15:05:29 +00:00
Thumb	LocalStackSlotAllocation improvements	2013-04-30 20:04:37 +00:00
Thumb2	Fix ARM FastISel tests, as a first step to enabling ARM FastISel	2013-05-14 16:26:38 +00:00
X86	DAGCombine: Also shrink eq compares where the constant is exactly as large as the smaller type.	2013-05-16 18:47:58 +00:00
XCore	[XCore] Fix handling of functions where only the LR is spilled.	2013-05-09 16:43:42 +00:00