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Jim Grosbach c34954d432 ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155391 91177308-0d34-0410-b5e6-96231b3b80d8

2012-04-23 21:00:47 +00:00

..

ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI.

2012-04-23 21:00:47 +00:00

MC assembly parser handling for trailing comma in macro instantiation.

2012-04-16 21:18:49 +00:00

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Added support for disassembling unpredictable swp/swpb ARM instructions.

2012-04-18 14:18:57 +00:00

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

This patch fixes 3 problems:

2012-04-16 18:20:26 +00:00

Add retw and lretw instructions. Also, fix Intel syntax parsing for all

2012-04-11 01:10:53 +00:00