llvm-6502/test/CodeGen
Bruno Cardoso Lopes 97dc60b759 Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix
PR10955 and PR10948.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140069 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19 21:29:24 +00:00
..
Alpha Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective. 2011-09-14 00:29:50 +00:00
ARM Some legalization fixes for atomic load and store. 2011-09-15 21:20:49 +00:00
Blackfin
CBackend
CellSPU Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction. 2011-09-02 10:05:01 +00:00
CPP
Generic This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll 2011-09-08 08:43:23 +00:00
MBlaze
Mips Delete test cases that generate code for allegrex/psp and cannot be repurposed. 2011-09-13 22:29:13 +00:00
MSP430
PowerPC Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective. 2011-09-14 00:29:50 +00:00
PTX
SPARC
SystemZ
Thumb Disable these tests harder. They're XFAIL'd, but that means they still run, and 2011-09-06 22:08:18 +00:00
Thumb2 Generalize this test's CHECK statements to handle different indvars modes. 2011-09-13 02:46:27 +00:00
X86 Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix 2011-09-19 21:29:24 +00:00
XCore Associate a MemOperand with LDWCP nodes introduced during ISel. 2011-09-12 14:43:23 +00:00