llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-17 03:30:28 +00:00

History

Evan Cheng 276365dd4b Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8		2011-06-30 01:53:36 +00:00
..
TargetInfo
Alpha.h	Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc	2011-06-28 20:07:07 +00:00
Alpha.td
AlphaAsmPrinter.cpp
AlphaBranchSelector.cpp
AlphaCallingConv.td
AlphaFrameLowering.cpp
AlphaFrameLowering.h
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.	2011-06-28 21:14:33 +00:00
AlphaInstrInfo.h
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp	Make sure we use the correct register class here since we'll need to	2011-06-30 01:05:46 +00:00
AlphaISelLowering.h	Move Alpha from getRegClassForInlineAsmConstraint to	2011-06-29 19:40:01 +00:00
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaMCAsmInfo.cpp
AlphaMCAsmInfo.h
AlphaRegisterInfo.cpp	Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.	2011-06-28 21:14:33 +00:00
AlphaRegisterInfo.h	Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc	2011-06-27 18:32:37 +00:00
AlphaRegisterInfo.td	Use set operations instead of plain lists to enumerate register classes.	2011-06-15 23:28:14 +00:00
AlphaRelocations.h
AlphaSchedule.td
AlphaSelectionDAGInfo.cpp
AlphaSelectionDAGInfo.h
AlphaSubtarget.cpp	Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to	2011-06-30 01:53:36 +00:00
AlphaSubtarget.h	Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to	2011-06-30 01:53:36 +00:00
AlphaTargetMachine.cpp	Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to	2011-06-30 01:53:36 +00:00
AlphaTargetMachine.h	Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to	2011-06-30 01:53:36 +00:00
CMakeLists.txt	Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc	2011-06-28 20:07:07 +00:00
Makefile	Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc	2011-06-28 20:07:07 +00:00
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum across bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extensions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html