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InstPrinter
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R600: Bank Swizzle now display SCL equivalent
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2013-06-29 19:32:29 +00:00 |
MCTargetDesc
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Remove address spaces from MC.
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2013-07-02 15:49:13 +00:00 |
TargetInfo
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R600: Remove unnecessary include
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2013-06-07 20:28:43 +00:00 |
AMDGPU.h
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
AMDGPU.td
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
AMDGPUAsmPrinter.cpp
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R600/SI: Initial local memory support
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2013-07-10 16:37:07 +00:00 |
AMDGPUAsmPrinter.h
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R600: Emit used GPRs count
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2013-04-17 15:17:25 +00:00 |
AMDGPUCallingConv.td
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R600/SI: Add support for f64 kernel arguments
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2013-07-12 18:15:26 +00:00 |
AMDGPUConvertToISA.cpp
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AMDGPUFrameLowering.cpp
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R600: Fix calculation of stack offset in AMDGPUFrameLowering
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2013-06-07 20:52:05 +00:00 |
AMDGPUFrameLowering.h
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AMDGPUIndirectAddressing.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
AMDGPUInstrInfo.cpp
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R600: Use new getNamedOperandIdx function generated by TableGen
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2013-06-25 21:22:18 +00:00 |
AMDGPUInstrInfo.h
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R600: Use new getNamedOperandIdx function generated by TableGen
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2013-06-25 21:22:18 +00:00 |
AMDGPUInstrInfo.td
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Create an FPOW SDNode opcode def in the target independent .td file rather than in a specific backend.
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2013-05-22 06:36:09 +00:00 |
AMDGPUInstructions.td
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R600: Add local memory support via LDS
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2013-06-28 15:47:08 +00:00 |
AMDGPUIntrinsics.td
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
AMDGPUISelLowering.cpp
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R600/SI: Add initial double precision support for SI
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2013-07-12 18:14:56 +00:00 |
AMDGPUISelLowering.h
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R600: Use DAG lowering pass to handle fcos/fsin
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2013-07-09 15:03:11 +00:00 |
AMDGPUMachineFunction.cpp
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R600: Add local memory support via LDS
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2013-06-28 15:47:08 +00:00 |
AMDGPUMachineFunction.h
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R600: Add local memory support via LDS
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2013-06-28 15:47:08 +00:00 |
AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPURegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
AMDGPURegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
AMDGPURegisterInfo.td
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Make SubRegIndex size mandatory, following r183020.
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2013-05-31 23:45:26 +00:00 |
AMDGPUSubtarget.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
AMDGPUSubtarget.h
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
AMDGPUTargetMachine.cpp
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R600: Do not predicated basic block with multiple alu clause
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2013-07-09 15:03:33 +00:00 |
AMDGPUTargetMachine.h
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Remove dead prototype.
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2013-06-18 06:24:14 +00:00 |
AMDILBase.td
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R600: Move Subtarget feature definitions into AMDGPU.td
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2013-06-07 20:28:49 +00:00 |
AMDILCFGStructurizer.cpp
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Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
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2013-07-14 04:42:23 +00:00 |
AMDILInstrInfo.td
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
AMDILIntrinsicInfo.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
AMDILIntrinsicInfo.h
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AMDILIntrinsics.td
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AMDILISelDAGToDAG.cpp
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R600: Add local memory support via LDS
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2013-06-28 15:47:08 +00:00 |
AMDILISelLowering.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
AMDILRegisterInfo.td
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CMakeLists.txt
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Move StructurizeCFG out of R600 to generic Transforms.
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2013-06-19 20:18:24 +00:00 |
LLVMBuild.txt
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Makefile
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Processors.td
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Add a newline.
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2013-07-01 21:31:10 +00:00 |
R600ControlFlowFinalizer.cpp
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R600: Do not predicated basic block with multiple alu clause
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2013-07-09 15:03:33 +00:00 |
R600Defines.h
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R600: Add local memory support via LDS
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2013-06-28 15:47:08 +00:00 |
R600EmitClauseMarkers.cpp
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Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
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2013-07-14 04:42:23 +00:00 |
R600ExpandSpecialInstrs.cpp
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R600: Use new getNamedOperandIdx function generated by TableGen
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2013-06-25 21:22:18 +00:00 |
R600InstrFormats.td
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R600: Add local memory support via LDS
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2013-06-28 15:47:08 +00:00 |
R600InstrInfo.cpp
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Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
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2013-07-14 04:42:23 +00:00 |
R600InstrInfo.h
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R600: Support schedule and packetization of trans-only inst
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2013-06-29 19:32:43 +00:00 |
R600Instructions.td
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R600: Do not predicated basic block with multiple alu clause
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2013-07-09 15:03:33 +00:00 |
R600Intrinsics.td
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R600: Improve texture handling
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2013-05-17 16:50:20 +00:00 |
R600ISelLowering.cpp
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R600/SI: Initial local memory support
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2013-07-10 16:37:07 +00:00 |
R600ISelLowering.h
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R600: Use DAG lowering pass to handle fcos/fsin
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2013-07-09 15:03:11 +00:00 |
R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
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2013-05-23 17:10:37 +00:00 |
R600MachineScheduler.cpp
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R600: Support schedule and packetization of trans-only inst
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2013-06-29 19:32:43 +00:00 |
R600MachineScheduler.h
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R600: Support schedule and packetization of trans-only inst
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2013-06-29 19:32:43 +00:00 |
R600OptimizeVectorRegisters.cpp
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R600: Fix wrong export reswizzling
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2013-07-09 15:03:19 +00:00 |
R600Packetizer.cpp
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R600: Do not predicated basic block with multiple alu clause
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2013-07-09 15:03:33 +00:00 |
R600RegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
R600RegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
R600RegisterInfo.td
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R600: Support schedule and packetization of trans-only inst
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2013-06-29 19:32:43 +00:00 |
R600Schedule.td
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R600: Add local memory support via LDS
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2013-06-28 15:47:08 +00:00 |
R600TextureIntrinsicsReplacer.cpp
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Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
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2013-05-23 17:10:37 +00:00 |
SIAnnotateControlFlow.cpp
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R600: Remove unnecessary include
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2013-06-07 20:28:43 +00:00 |
SIDefines.h
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R600/SI: Initial local memory support
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2013-07-10 16:37:07 +00:00 |
SIInsertWaits.cpp
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R600/SI: Initial support for LDS/GDS instructions
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2013-07-10 16:36:43 +00:00 |
SIInstrFormats.td
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R600/SI: Initial support for LDS/GDS instructions
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2013-07-10 16:36:43 +00:00 |
SIInstrInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
SIInstrInfo.h
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R600/SI: adjust writemask to only the used components
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2013-04-10 08:39:08 +00:00 |
SIInstrInfo.td
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R600: Remove unsafe type punning. No intended functionality change.
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2013-07-12 20:18:05 +00:00 |
SIInstructions.td
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R600/SI: Implement select and compares for SI
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2013-07-12 18:15:19 +00:00 |
SIIntrinsics.td
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R600/SI: Add intrinsic for retrieving the current thread ID
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2013-07-10 16:36:52 +00:00 |
SIISelLowering.cpp
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R600/SI: Add double precision fsub pattern for SI
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2013-07-12 18:15:08 +00:00 |
SIISelLowering.h
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R600/SI: Report unaligned memory accesses as legal for > 32-bit types
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2013-06-25 02:39:35 +00:00 |
SILowerControlFlow.cpp
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R600/SI: Initial support for LDS/GDS instructions
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2013-07-10 16:36:43 +00:00 |
SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIRegisterInfo.cpp
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
SIRegisterInfo.h
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Don't cache the instruction and register info from the TargetMachine, because
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2013-06-07 20:28:55 +00:00 |
SIRegisterInfo.td
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R600/SI: dynamical figure out the reg class of MIMG
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2013-04-10 08:39:16 +00:00 |
SISchedule.td
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