llvm-6502/test/CodeGen
Jonathan Roelofs cab5680f6c Fix load-store optimizer on thumbv4t
Thumbv4t does not have lo->lo copies other than MOVS,
and that can't be predicated. So emit MOVS when needed
and bail if there's a predicate.

http://reviews.llvm.org/D6592


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226711 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 22:39:43 +00:00
..
AArch64 Revert "DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))" 2015-01-21 15:48:52 +00:00
ARM Fix load-store optimizer on thumbv4t 2015-01-21 22:39:43 +00:00
CPP
Generic
Hexagon [Hexagon] Converting multiply and accumulate with immediate intrinsics to patterns. 2015-01-21 18:13:15 +00:00
Inputs
Mips [mips] Add registers and ALL check prefix to octeon test case. 2015-01-20 16:14:02 +00:00
MSP430
NVPTX Check that the TLI callback enableAggressiveFMAFusion has the desired effect on FMA folding. 2015-01-14 15:36:28 +00:00
PowerPC [PowerPC] Add r2 as an operand for all calls under both PPC64 ELF V1 and V2 2015-01-19 07:20:27 +00:00
R600 R600/SI: Custom lower fround 2015-01-21 18:18:25 +00:00
SPARC
SystemZ Use the integrated assembler as default on SystemZ 2015-01-13 19:45:16 +00:00
Thumb
Thumb2
X86 [X86] Declare SSE4.1/AVX2 vector extloads covered by PMOV[SZ]X legal. 2015-01-21 17:07:06 +00:00
XCore