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arm-tests.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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basic-arm-instructions.txt
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Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.
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2011-08-26 23:32:08 +00:00 |
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dg.exp
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fp-encoding.txt
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Add some more comprehensive VFP decoding tests.
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2011-08-15 21:29:01 +00:00 |
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invalid-Bcc-thumb.txt
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Tighten Thumb1 branch predicate decoding.
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2011-08-09 21:07:45 +00:00 |
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invalid-BFI-arm.txt
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Create a new register class for the set of all GPRs except the PC. Use it to tighten our decoding of BFI.
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2011-08-09 22:48:45 +00:00 |
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invalid-CPS2p-arm.txt
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Tighten operand checking on CPS instructions.
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2011-08-09 23:05:39 +00:00 |
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invalid-CPS3p-arm.txt
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Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions.
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2011-08-18 22:11:02 +00:00 |
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invalid-DMB-thumb.txt
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Tighten operand checking on memory barrier instructions.
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2011-08-09 23:25:42 +00:00 |
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invalid-DSB-arm.txt
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Tighten operand checking on memory barrier instructions.
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2011-08-09 23:25:42 +00:00 |
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invalid-IT-CBNZ-thumb.txt
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Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block.
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2011-09-08 22:42:49 +00:00 |
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invalid-IT-thumb.txt
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Add a testcase for r138625.
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2011-08-26 06:45:08 +00:00 |
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invalid-LDC-form-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-LDM-thumb.txt
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LDM writeback is not allowed if Rn is in the target register list.
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2011-09-09 23:13:33 +00:00 |
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invalid-LDR_POST-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-LDR_PRE-arm.txt
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invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure.
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2011-08-26 20:43:14 +00:00 |
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invalid-LDRB_POST-arm.txt
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Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
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2011-08-17 17:44:15 +00:00 |
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invalid-LDRD_PRE-thumb.txt
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Thumb2 assembly parsing and encoding for LDRD(immediate).
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2011-09-08 22:07:06 +00:00 |
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invalid-LDRD-arm.txt
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Test commit; adding test for invalid LDRD which was part of the patch for r137647 but seemingly didn't get svn add'ed.
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2011-08-18 18:03:02 +00:00 |
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invalid-LDRrs-arm.txt
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invalid-LDRT-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-LSL-regform.txt
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Tighten operand checking of register-shifted-register operands.
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2011-08-09 23:33:27 +00:00 |
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invalid-MCR-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-MOVr-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-MOVs-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-MOVs-LSL-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-MOVTi16-arm.txt
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Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
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2011-08-10 00:03:03 +00:00 |
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invalid-MSRi-arm.txt
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Continue to tighten decoding by performing more operand validation.
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2011-08-11 20:21:46 +00:00 |
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invalid-RFEorLDMIA-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-RSC-arm.txt
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Tighten operand checking of register-shifted-register operands.
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2011-08-09 23:33:27 +00:00 |
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invalid-SBFX-arm.txt
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Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
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2011-08-10 00:03:03 +00:00 |
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invalid-SMLAD-arm.txt
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Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
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2011-08-10 00:03:03 +00:00 |
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invalid-SRS-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-SSAT-arm.txt
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Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
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2011-08-10 00:03:03 +00:00 |
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invalid-STMIA_UPD-thumb.txt
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Continue to tighten decoding by performing more operand validation.
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2011-08-11 20:21:46 +00:00 |
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invalid-STRBrs-arm.txt
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Continue to tighten decoding by performing more operand validation.
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2011-08-11 20:21:46 +00:00 |
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invalid-SXTB-arm.txt
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Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
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2011-08-10 00:03:03 +00:00 |
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invalid-t2Bcc-thumb.txt
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Tighten operand checking on memory barrier instructions.
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2011-08-09 23:25:42 +00:00 |
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invalid-t2LDRBT-thumb.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-t2LDREXD-thumb.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-t2LDRSHi8-thumb.txt
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Improve operand validation for Thumb2 addressing modes.
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2011-08-11 20:40:40 +00:00 |
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invalid-t2LDRSHi12-thumb.txt
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Improve operand validation for Thumb2 addressing modes.
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2011-08-11 20:40:40 +00:00 |
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invalid-t2PUSH-thumb.txt
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Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either.
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2011-09-12 21:28:46 +00:00 |
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invalid-t2STR_POST-thumb.txt
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Improve operand validation for Thumb2 addressing modes.
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2011-08-11 20:40:40 +00:00 |
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invalid-t2STRD_PRE-thumb.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-t2STREXB-thumb.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-t2STREXD-thumb.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-UMAAL-arm.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-UQADD8-arm.txt
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Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
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2011-08-10 00:03:03 +00:00 |
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invalid-VLD1DUPq8_UPD-arm.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-VLD3DUPd32_UPD-thumb.txt
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Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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2011-08-09 20:55:18 +00:00 |
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invalid-VLDMSDB_UPD-arm.txt
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Improve error checking in the new ARM disassembler. Patch by James Molloy.
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2011-08-11 18:24:51 +00:00 |
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invalid-VQADD-arm.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-VST2b32_UPD-arm.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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memory-arm-instructions.txt
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Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact.
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2011-08-15 20:51:32 +00:00 |
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neon-tests.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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neon.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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neont2.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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thumb1.txt
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Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.
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2011-08-26 18:09:22 +00:00 |
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thumb2.txt
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Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered.
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2011-09-12 18:56:30 +00:00 |
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thumb-printf.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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thumb-tests.txt
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Create Thumb2 versions of STC/LDC, and reenable the relevant tests.
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2011-09-07 21:10:42 +00:00 |
cd00dc6852