mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-05 22:59:16 +00:00
31867660cb
When set, this bit indicates that a register is completely defined by the value of its sub-registers. Use the CoveredBySubRegs property to infer which super-registers are call-preserved given a list of callee-saved registers. For example, the ARM registers D8-D15 are callee-saved. This now automatically implies that Q4-Q7 are call-preserved. Conversely, Win64 callees save XMM6-XMM15, but the corresponding YMM6-YMM15 registers are not call-preserved because they are not fully defined by their sub-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148363 91177308-0d34-0410-b5e6-96231b3b80d8 |
||
---|---|---|
.. | ||
AsmParser | ||
InstPrinter | ||
MCTargetDesc | ||
TargetInfo | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile | ||
Mips64InstrInfo.td | ||
Mips.h | ||
Mips.td | ||
MipsAsmPrinter.cpp | ||
MipsAsmPrinter.h | ||
MipsCallingConv.td | ||
MipsCodeEmitter.cpp | ||
MipsCondMov.td | ||
MipsDelaySlotFiller.cpp | ||
MipsEmitGPRestore.cpp | ||
MipsExpandPseudo.cpp | ||
MipsFrameLowering.cpp | ||
MipsFrameLowering.h | ||
MipsInstrFormats.td | ||
MipsInstrFPU.td | ||
MipsInstrInfo.cpp | ||
MipsInstrInfo.h | ||
MipsInstrInfo.td | ||
MipsISelDAGToDAG.cpp | ||
MipsISelLowering.cpp | ||
MipsISelLowering.h | ||
MipsJITInfo.cpp | ||
MipsJITInfo.h | ||
MipsMachineFunction.cpp | ||
MipsMachineFunction.h | ||
MipsMCInstLower.cpp | ||
MipsMCInstLower.h | ||
MipsRegisterInfo.cpp | ||
MipsRegisterInfo.h | ||
MipsRegisterInfo.td | ||
MipsRelocations.h | ||
MipsSchedule.td | ||
MipsSelectionDAGInfo.cpp | ||
MipsSelectionDAGInfo.h | ||
MipsSubtarget.cpp | ||
MipsSubtarget.h | ||
MipsTargetMachine.cpp | ||
MipsTargetMachine.h | ||
MipsTargetObjectFile.cpp | ||
MipsTargetObjectFile.h |