Craig Topper ced2756280 Recommit r201059 and r201060 with hopefully a fix for its original failure. ... Original commits messages: Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code. Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201065 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-10 06:55:41 +00:00
..
AlignedBundling	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
3DNow.s
2011-09-06-NoNewline.s	Move test to the X86 directory, note the PR number and only run MC once.	2011-10-31 17:23:09 +00:00
address-size.s	[x86] Add basic support for .code16	2014-01-06 04:55:54 +00:00
avx512-encodings.s	AVX-512: fixed a bug in EVEX encoding (the bug appeared after r200624)	2014-02-05 13:03:01 +00:00
cfi_def_cfa-crash.s	X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable()	2013-11-08 22:33:06 +00:00
fde-reloc.s	Move test since it depends on the X86 backend.	2013-03-28 17:01:28 +00:00
fixup-cpu-mode.s	Tests for mode switching	2014-01-28 23:13:30 +00:00
gnux32-dwarf-gen.s	Now that llvm-dwarfdump supports flags to specify which DWARF section to dump,	2013-01-25 21:44:53 +00:00
index-operations.s	[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)	2014-01-22 15:08:55 +00:00
intel-syntax-2.s	Add newline.	2012-09-10 23:09:27 +00:00
intel-syntax-avx512.s	Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax.	2014-01-17 07:37:39 +00:00
intel-syntax-bitwise-ops.s	Update the X86 assembler for .intel_syntax to accept	2014-02-06 01:21:15 +00:00
intel-syntax-directional-label.s	Un-revert: the buildbot failure in LLVM on lld-x86_64-win7 had me with	2013-12-19 23:16:14 +00:00
intel-syntax-encoding.s	Post process ADC/SBB and use a shorter encoding if they use a sign extended immediate.	2013-03-18 03:34:55 +00:00
intel-syntax-hex.s	'Hexadecimal' has two 'a's and only one 'i'.	2013-02-25 18:11:18 +00:00
intel-syntax-invalid-basereg.s	Update the X86 assembler for .intel_syntax to produce an error for invalid base	2014-01-23 22:34:42 +00:00
intel-syntax-invalid-scale.s	Update the X86 assembler for .intel_syntax to produce an error for invalid	2014-01-23 21:52:41 +00:00
intel-syntax.s	Teach x86 asm parser to handle 'opaque ptr' in Intel syntax.	2014-01-17 07:44:10 +00:00
lit.local.cfg	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
padlock.s
relax-insn.s	[x86] Do not relax PUSHi16 to PUSHi32 (PR18414)	2014-01-08 12:58:32 +00:00
ret.s	[x86] Support i386-*-*-code16 triple for emitting 16-bit code	2014-01-20 12:02:25 +00:00
shuffle-comments.s	Merge SSE and AVX shuffle instructions in the comment printer.	2013-01-29 07:54:31 +00:00
stackmap-nops.ll	Grow the stackmap/patchpoint format to hold 64-bit IDs.	2013-12-13 18:37:10 +00:00
variant-diagnostics.s	MC: fix test locations/name	2014-01-26 22:55:02 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s	Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.	2014-01-31 05:33:45 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s	Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.	2013-10-14 04:55:01 +00:00
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s	Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit set. The VEX.B was being calculated from the wrong operand. Fixes at least some portion of PR14185.	2013-03-14 07:40:52 +00:00
x86_64-hle-encoding.s	Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.	2013-06-18 17:08:10 +00:00
x86_64-imm-widths.s
x86_64-rand-encoding.s	Add support of RDSEED defined in AVX2 extension	2013-03-28 23:41:26 +00:00
x86_64-rtm-encoding.s	x86 -- add the XTEST instruction	2013-03-25 18:59:43 +00:00
x86_64-signed-reloc.s	[x86] Fix signed relocations for i64i32imm operands	2014-01-30 22:20:41 +00:00
x86_64-sse4a.s	Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.	2012-05-29 19:05:25 +00:00
x86_64-tbm-encoding.s	Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.	2014-01-31 05:33:45 +00:00
x86_64-xop-encoding.s	XOP instructions and encoding tests.	2011-12-12 19:37:49 +00:00
x86_directives.s
x86_errors.s	[x86] Make AsmParser validate registers for memory operands a bit better	2014-01-08 12:58:28 +00:00
x86_long_nop.s	Fixes a test by replacing .align by .p2align and setting triples explicitly.	2013-03-05 18:56:14 +00:00
x86_nop.s	Use -triple to fix the test on non-ELF hosts.	2013-11-25 20:46:18 +00:00
x86_operands.s
x86-16.s	[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)	2014-01-22 15:08:55 +00:00
x86-32-avx.s	Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior.	2013-01-06 20:39:29 +00:00
x86-32-coverage.s	Add test cases for the various instruction alias and Intel syntax fixes that have gone in lately.	2013-07-26 05:39:33 +00:00
x86-32-fma3.s
x86-32-ms-inline-asm.s	[ms-inline asm] Add support of imm displacement before bracketed memory	2013-03-27 21:49:56 +00:00
x86-32.s	[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)	2014-01-22 15:08:55 +00:00
x86-64.s	Recommit r201059 and r201060 with hopefully a fix for its original failure.	2014-02-10 06:55:41 +00:00
x86-target-directives.s	correct target directive handling error handling	2014-01-13 01:15:39 +00:00