mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22553 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
.cvsignore | ||
LICENSE.TXT | ||
Makefile | ||
PowerPC.td | ||
PowerPCInstrInfo.h | ||
PowerPCTargetMachine.h | ||
PPC32.td | ||
PPC32ISelSimple.cpp | ||
PPC32JITInfo.h | ||
PPC32RegisterInfo.td | ||
PPC64.td | ||
PPC64CodeEmitter.cpp | ||
PPC64InstrInfo.cpp | ||
PPC64InstrInfo.h | ||
PPC64ISelPattern.cpp | ||
PPC64JITInfo.h | ||
PPC64RegisterInfo.cpp | ||
PPC64RegisterInfo.h | ||
PPC64RegisterInfo.td | ||
PPC64TargetMachine.h | ||
PPC.h | ||
PPCAsmPrinter.cpp | ||
PPCBranchSelector.cpp | ||
PPCCodeEmitter.cpp | ||
PPCFrameInfo.h | ||
PPCInstrBuilder.h | ||
PPCInstrFormats.td | ||
PPCInstrInfo.cpp | ||
PPCInstrInfo.h | ||
PPCInstrInfo.td | ||
PPCISelPattern.cpp | ||
PPCJITInfo.cpp | ||
PPCJITInfo.h | ||
PPCRegisterInfo.cpp | ||
PPCRegisterInfo.h | ||
PPCRegisterInfo.td | ||
PPCRelocations.h | ||
PPCTargetMachine.cpp | ||
PPCTargetMachine.h | ||
README.txt |
TODO: * gpr0 allocation * implement do-loop -> bdnz transform * implement powerpc-64 for darwin * use stfiwx in float->int * be able to combine sequences like the following into 2 instructions: lis r2, ha16(l2__ZTV4Cell) la r2, lo16(l2__ZTV4Cell)(r2) addi r2, r2, 8 * should hint to the branch select pass that it doesn't need to print the second unconditional branch, so we don't end up with things like: b .LBBl42__2E_expand_function_8_674 ; loopentry.24 b .LBBl42__2E_expand_function_8_42 ; NewDefault b .LBBl42__2E_expand_function_8_42 ; NewDefault