Matt Arsenault 9061eb6d2e R600/SI: Only select cvt_flr/cvt_rpi with no NaNs. ... These have different behavior from cvt_i32_f32 on NaN. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227693 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-31 21:28:13 +00:00
..
AArch64	[AArch64] Add a few more DUP testcases. NFC.	2015-01-30 23:41:15 +00:00
ARM	ARM: support stack probe size on Windows on ARM	2015-01-31 02:26:37 +00:00
BPF	bpf: add missing lit.local.cfg	2015-01-24 18:20:52 +00:00
CPP
Generic	overloaded-intrinsic-name: exercise anyptr on struct	2015-01-27 20:03:08 +00:00
Hexagon	[Hexagon] Deleting old variants of intrinsics and adding missing tests.	2015-01-29 17:26:56 +00:00
Inputs	IR: Move MDLocation into place	2015-01-14 22:27:36 +00:00
Mips	Move the Mips target to storing the ABI in the TargetMachine rather	2015-01-26 17:33:46 +00:00
MSP430
NVPTX	[NVPTX] Generate a more optimal sequence for select of i1	2015-01-26 19:52:20 +00:00
PowerPC	[PowerPC] Complete setting the baseline for ppc64le	2015-01-29 15:59:09 +00:00
R600	R600/SI: Only select cvt_flr/cvt_rpi with no NaNs.	2015-01-31 21:28:13 +00:00
SPARC
SystemZ
Thumb	IR: Move MDLocation into place	2015-01-14 22:27:36 +00:00
Thumb2
X86	[X86][SSE] Shuffle mask decode support for zero extend, scalar float/double moves and integer load instructions	2015-01-31 14:09:36 +00:00
XCore	IR: Move MDLocation into place	2015-01-14 22:27:36 +00:00