Evan Cheng d35b8c1adb Added isel patterns for RET, JMP, and WRITEPORT. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-04 08:19:43 +00:00
..
Alpha	major think-o	2005-12-01 17:48:51 +00:00
CBackend	do not allow '.' in symbol names	2005-11-10 21:39:29 +00:00
IA64	IA64 doesn't support the LOCATION node, and for some reason the ISelPattern	2005-12-01 18:19:53 +00:00
PowerPC	Make sure these get added into the codegenmap when appropriate	2005-12-01 18:09:22 +00:00
Skeleton	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
Sparc	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
SparcV8	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
SparcV9	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
X86	Added isel patterns for RET, JMP, and WRITEPORT.	2005-12-04 08:19:43 +00:00
Makefile	DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now	2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp	Rename MRegisterDesc -> TargetRegisterDesc for consistency	2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp	Preparation of supporting scheduling info. Need to find info based on selected	2005-10-25 15:15:28 +00:00
Target.td	* Added instruction property hasCtrlDep for those which r/w control-flow	2005-12-04 08:13:17 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSchedule.td	add a marker	2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td	* Added instruction property hasCtrlDep for those which r/w control-flow	2005-12-04 08:13:17 +00:00
TargetSubtarget.cpp